Displaying 5 results from an estimated 5 matches for "x86_feature_3dnow".
2008 May 06
4
[PATCH] fixup 3dnow! support
....padding[2] = 0;
}
vcpu->arch.cpuid_nent = cpuid->nent;
- cpuid_fix_nx_cap(vcpu);
+ cpuid_fix_caps(vcpu);
r = 0;
out_free:
@@ -1061,8 +1075,8 @@ static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
bit(X86_FEATURE_LM) |
#endif
bit(X86_FEATURE_MMXEXT) |
- bit(X86_FEATURE_3DNOWEXT) |
- bit(X86_FEATURE_3DNOW);
+ (bit(X86_FEATURE_3DNOWEXT) && cpu_has_3dnowext) |
+ (bit(X86_FEATURE_3DNOW) && cpu_has_3dnow);
const u32 kvm_supported_word3_x86_features =
bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16);
const u32 kvm_supported_word6_x86_features =
diff --...
2008 May 06
4
[PATCH] fixup 3dnow! support
....padding[2] = 0;
}
vcpu->arch.cpuid_nent = cpuid->nent;
- cpuid_fix_nx_cap(vcpu);
+ cpuid_fix_caps(vcpu);
r = 0;
out_free:
@@ -1061,8 +1075,8 @@ static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
bit(X86_FEATURE_LM) |
#endif
bit(X86_FEATURE_MMXEXT) |
- bit(X86_FEATURE_3DNOWEXT) |
- bit(X86_FEATURE_3DNOW);
+ (bit(X86_FEATURE_3DNOWEXT) && cpu_has_3dnowext) |
+ (bit(X86_FEATURE_3DNOW) && cpu_has_3dnow);
const u32 kvm_supported_word3_x86_features =
bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16);
const u32 kvm_supported_word6_x86_features =
diff --...
2007 Aug 09
0
[PATCH] x86/hvm: miscellaneous CPUID handling changes
...86_FEATURE_SVME & 31, &ecx);
+ __clear_bit(X86_FEATURE_SKINIT & 31, &ecx);
+
+ __clear_bit(X86_FEATURE_OSVW & 31, &ecx);
+ __clear_bit(X86_FEATURE_WDT & 31, &ecx);
/* So far, we do not support 3DNow for the guest. */
- clear_bit(X86_FEATURE_3DNOW & 31, &edx);
- clear_bit(X86_FEATURE_3DNOWEXT & 31, &edx);
- }
- else if ( input == 0x80000007 || input == 0x8000000A )
- {
+ __clear_bit(X86_FEATURE_3DNOW & 31, &edx);
+ __clear_bit(X86_FEATURE_3DNOWEXT & 31, &edx);
+ break;
+
+...
2007 Feb 01
0
[PATCH] hide RDTSCP feature flag from PV guests
...9,7 @@
#define X86_FEATURE_MP (1*32+19) /* MP Capable. */
#define X86_FEATURE_NX (1*32+20) /* Execute Disable */
#define X86_FEATURE_MMXEXT (1*32+22) /* AMD MMX extensions */
+#define X86_FEATURE_RDTSCP (1*32+27) /* RDTSCP */
#define X86_FEATURE_LM (1*32+29) /* Long Mode (x86-64) */
#define X86_FEATURE_3DNOWEXT (1*32+30) /* AMD 3DNow! extensions */
#define X86_FEATURE_3DNOW (1*32+31) /* 3DNow! */
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2007 Aug 09
1
[PATCH] svm: allow guest to use EFER.FFXSE and EFER.LMSLE
...mp; EFER_LMSLE) )
+ cpu_has_lmsl = 0;
+ else
+ wrmsr(MSR_EFER, eax ^ EFER_LMSLE, edx);
+#endif
+
if ( cpu != 0 )
return 1;
@@ -1131,8 +1154,6 @@ static void svm_vmexit_do_cpuid(struct v
/* So far, we do not support 3DNow for the guest. */
clear_bit(X86_FEATURE_3DNOW & 31, &edx);
clear_bit(X86_FEATURE_3DNOWEXT & 31, &edx);
- /* no FFXSR instructions feature. */
- clear_bit(X86_FEATURE_FFXSR & 31, &edx);
}
else if ( input == 0x80000007 || input == 0x8000000A )
{
Index: 2007-08-08/xen/include/asm-x86/c...