Displaying 20 results from an estimated 23 matches for "x86_eflags_df".
2020 May 16
1
[PATCH v3 25/75] x86/sev-es: Add support for handling IOIO exceptions
Just a reminder so that this doesn't get lost:
On Tue, Apr 28, 2020 at 05:16:35PM +0200, Joerg Roedel wrote:
> + if (exit_info_1 & IOIO_TYPE_STR) {
> + int df = (regs->flags & X86_EFLAGS_DF) ? -1 : 1;
...
> +
> + if (!(exit_info_1 & IOIO_TYPE_IN)) {
> + ret = vc_insn_string_read(ctxt,
> + (void *)(es_base + regs->si),
> + ghcb->shared_buffer, io_bytes,
> + exit_info_2, df);
^^^^
> +
> + /* Everything w...
2020 Apr 28
0
[PATCH v3 52/75] x86/sev-es: Handle MMIO String Instructions
...signed char *)ctxt->regs->si;
+ dst = es_base + (unsigned char *)ctxt->regs->di;
+
+ ret = vc_read_mem(ctxt, src, buffer, bytes);
+ if (ret != ES_OK)
+ return ret;
+
+ ret = vc_write_mem(ctxt, dst, buffer, bytes);
+ if (ret != ES_OK)
+ return ret;
+
+ if (ctxt->regs->flags & X86_EFLAGS_DF)
+ off = -bytes;
+ else
+ off = bytes;
+
+ ctxt->regs->si += off;
+ ctxt->regs->di += off;
+
+ rep = insn_has_rep_prefix(&ctxt->insn);
+
+ if (rep)
+ ctxt->regs->cx -= 1;
+
+ if (!rep || ctxt->regs->cx == 0)
+ return ES_OK;
+ else
+ return ES_RETRY;
+}
+
static...
2020 Feb 11
0
[PATCH 19/62] x86/sev-es: Add support for handling IOIO exceptions
...ruct ghcb *ghcb, struct es_em_ctxt *ctxt)
+{
+ struct pt_regs *regs = ctxt->regs;
+ u64 exit_info_1, exit_info_2;
+ enum es_result ret;
+
+ ret = ioio_exitinfo(ctxt, &exit_info_1);
+ if (ret != ES_OK)
+ return ret;
+
+ if (exit_info_1 & IOIO_TYPE_STR) {
+ int df = (regs->flags & X86_EFLAGS_DF) ? -1 : 1;
+ unsigned int io_bytes, exit_bytes;
+ unsigned int ghcb_count, op_count;
+ u64 sw_scratch;
+
+ /*
+ * For the string variants with rep prefix the amount of in/out
+ * operations per #VC exception is limited so that the kernel
+ * has a chance to take interrupts an re-schedule...
2007 Aug 08
2
[PATCH] x86-64: syscall/sysenter support for 32-bit apps
...2007-08-08 11:37:08.000000000 +0200
@@ -413,6 +413,12 @@ int vcpu_initialise(struct vcpu *v)
v->arch.perdomain_ptes =
d->arch.mm_perdomain_pt + (v->vcpu_id << GDT_LDT_VCPU_SHIFT);
+#ifdef __x86_64__
+ v->arch.sysexit_cs = 3;
+ v->arch.syscall_eflags_mask = X86_EFLAGS_DF|X86_EFLAGS_TF|X86_EFLAGS_NT|
+ X86_EFLAGS_RF|X86_EFLAGS_VM;
+#endif
+
return (is_pv_32on64_vcpu(v) ? setup_compat_l4(v) : 0);
}
@@ -625,7 +631,18 @@ int arch_set_info_guest(
v->arch.flags |= TF_kernel_mode;
if ( !compat )
+ {
m...
2020 Apr 28
0
[PATCH v3 25/75] x86/sev-es: Add support for handling IOIO exceptions
...t ghcb *ghcb, struct es_em_ctxt *ctxt)
+{
+ struct pt_regs *regs = ctxt->regs;
+ u64 exit_info_1, exit_info_2;
+ enum es_result ret;
+
+ ret = vc_ioio_exitinfo(ctxt, &exit_info_1);
+ if (ret != ES_OK)
+ return ret;
+
+ if (exit_info_1 & IOIO_TYPE_STR) {
+ int df = (regs->flags & X86_EFLAGS_DF) ? -1 : 1;
+ unsigned int io_bytes, exit_bytes;
+ unsigned int ghcb_count, op_count;
+ unsigned long es_base;
+ u64 sw_scratch;
+
+ /*
+ * For the string variants with rep prefix the amount of in/out
+ * operations per #VC exception is limited so that the kernel
+ * has a chance to take...
2020 May 20
2
[PATCH v3 25/75] x86/sev-es: Add support for handling IOIO exceptions
...truct pt_regs *regs = ctxt->regs;
> + u64 exit_info_1, exit_info_2;
> + enum es_result ret;
> +
> + ret = vc_ioio_exitinfo(ctxt, &exit_info_1);
> + if (ret != ES_OK)
> + return ret;
> +
> + if (exit_info_1 & IOIO_TYPE_STR) {
> + int df = (regs->flags & X86_EFLAGS_DF) ? -1 : 1;
> + unsigned int io_bytes, exit_bytes;
> + unsigned int ghcb_count, op_count;
> + unsigned long es_base;
> + u64 sw_scratch;
> +
> + /*
> + * For the string variants with rep prefix the amount of in/out
> + * operations per #VC exception is limited so tha...
2020 May 20
2
[PATCH v3 25/75] x86/sev-es: Add support for handling IOIO exceptions
...truct pt_regs *regs = ctxt->regs;
> + u64 exit_info_1, exit_info_2;
> + enum es_result ret;
> +
> + ret = vc_ioio_exitinfo(ctxt, &exit_info_1);
> + if (ret != ES_OK)
> + return ret;
> +
> + if (exit_info_1 & IOIO_TYPE_STR) {
> + int df = (regs->flags & X86_EFLAGS_DF) ? -1 : 1;
> + unsigned int io_bytes, exit_bytes;
> + unsigned int ghcb_count, op_count;
> + unsigned long es_base;
> + u64 sw_scratch;
> +
> + /*
> + * For the string variants with rep prefix the amount of in/out
> + * operations per #VC exception is limited so tha...
2013 Oct 10
10
[PATCH 0/4] x86: XSA-67 follow-up
1: correct LDT checks
2: add address validity check to guest_map_l1e()
3: use {rd,wr}{fs,gs}base when available
4: check for canonical address before doing page walks
Signed-off-by: Jan Beulich <jbeulich@suse.com>
2005 Apr 02
1
[PATCH] VMX support for MMIO/PIO in VM8086 mode
...addr = (exit_qualification >> 16) & (0xffff);
@@ -325,17 +329,29 @@
p->size = (exit_qualification & 7) + 1;
if (test_bit(4, &exit_qualification)) {
- unsigned long eflags;
-
- __vmread(GUEST_EFLAGS, &eflags);
p->df = (eflags & X86_EFLAGS_DF) ? 1 : 0;
p->pdata_valid = 1;
- p->u.pdata = (void *) ((p->dir == IOREQ_WRITE) ?
- regs->esi
- : regs->edi);
+
+ if (vm86) {
+ unsigned long seg;
+ if (p->dir == IOREQ_WRITE) {
+ __vmread(GUEST_DS_SE...
2007 Apr 18
2
[PATCH] Clean up x86 control register and MSR macros (corrected)
...000004 /* Parity Flag */
-#define X86_EFLAGS_AF 0x00000010 /* Auxillary carry Flag */
-#define X86_EFLAGS_ZF 0x00000040 /* Zero Flag */
-#define X86_EFLAGS_SF 0x00000080 /* Sign Flag */
-#define X86_EFLAGS_TF 0x00000100 /* Trap Flag */
-#define X86_EFLAGS_IF 0x00000200 /* Interrupt Flag */
-#define X86_EFLAGS_DF 0x00000400 /* Direction Flag */
-#define X86_EFLAGS_OF 0x00000800 /* Overflow Flag */
-#define X86_EFLAGS_IOPL 0x00003000 /* IOPL mask */
-#define X86_EFLAGS_NT 0x00004000 /* Nested Task */
-#define X86_EFLAGS_RF 0x00010000 /* Resume Flag */
-#define X86_EFLAGS_VM 0x00020000 /* Virtual Mode */
-#de...
2007 Apr 18
2
[PATCH] Clean up x86 control register and MSR macros (corrected)
...000004 /* Parity Flag */
-#define X86_EFLAGS_AF 0x00000010 /* Auxillary carry Flag */
-#define X86_EFLAGS_ZF 0x00000040 /* Zero Flag */
-#define X86_EFLAGS_SF 0x00000080 /* Sign Flag */
-#define X86_EFLAGS_TF 0x00000100 /* Trap Flag */
-#define X86_EFLAGS_IF 0x00000200 /* Interrupt Flag */
-#define X86_EFLAGS_DF 0x00000400 /* Direction Flag */
-#define X86_EFLAGS_OF 0x00000800 /* Overflow Flag */
-#define X86_EFLAGS_IOPL 0x00003000 /* IOPL mask */
-#define X86_EFLAGS_NT 0x00004000 /* Nested Task */
-#define X86_EFLAGS_RF 0x00010000 /* Resume Flag */
-#define X86_EFLAGS_VM 0x00020000 /* Virtual Mode */
-#de...
2007 Apr 18
1
No subject
...000004 /* Parity Flag */
-#define X86_EFLAGS_AF 0x00000010 /* Auxillary carry Flag */
-#define X86_EFLAGS_ZF 0x00000040 /* Zero Flag */
-#define X86_EFLAGS_SF 0x00000080 /* Sign Flag */
-#define X86_EFLAGS_TF 0x00000100 /* Trap Flag */
-#define X86_EFLAGS_IF 0x00000200 /* Interrupt Flag */
-#define X86_EFLAGS_DF 0x00000400 /* Direction Flag */
-#define X86_EFLAGS_OF 0x00000800 /* Overflow Flag */
-#define X86_EFLAGS_IOPL 0x00003000 /* IOPL mask */
-#define X86_EFLAGS_NT 0x00004000 /* Nested Task */
-#define X86_EFLAGS_RF 0x00010000 /* Resume Flag */
-#define X86_EFLAGS_VM 0x00020000 /* Virtual Mode */
-#de...
2007 Apr 18
1
No subject
...000004 /* Parity Flag */
-#define X86_EFLAGS_AF 0x00000010 /* Auxillary carry Flag */
-#define X86_EFLAGS_ZF 0x00000040 /* Zero Flag */
-#define X86_EFLAGS_SF 0x00000080 /* Sign Flag */
-#define X86_EFLAGS_TF 0x00000100 /* Trap Flag */
-#define X86_EFLAGS_IF 0x00000200 /* Interrupt Flag */
-#define X86_EFLAGS_DF 0x00000400 /* Direction Flag */
-#define X86_EFLAGS_OF 0x00000800 /* Overflow Flag */
-#define X86_EFLAGS_IOPL 0x00003000 /* IOPL mask */
-#define X86_EFLAGS_NT 0x00004000 /* Nested Task */
-#define X86_EFLAGS_RF 0x00010000 /* Resume Flag */
-#define X86_EFLAGS_VM 0x00020000 /* Virtual Mode */
-#de...
2020 Apr 28
116
[PATCH v3 00/75] x86: SEV-ES Guest Support
Hi,
here is the next version of changes to enable Linux to run as an SEV-ES
guest. The code was rebased to v5.7-rc3 and got a fair number of changes
since the last version.
What is SEV-ES
==============
SEV-ES is an acronym for 'Secure Encrypted Virtualization - Encrypted
State' and means a hardware feature of AMD processors which hides the
register state of VCPUs to the hypervisor by
2020 Apr 28
116
[PATCH v3 00/75] x86: SEV-ES Guest Support
Hi,
here is the next version of changes to enable Linux to run as an SEV-ES
guest. The code was rebased to v5.7-rc3 and got a fair number of changes
since the last version.
What is SEV-ES
==============
SEV-ES is an acronym for 'Secure Encrypted Virtualization - Encrypted
State' and means a hardware feature of AMD processors which hides the
register state of VCPUs to the hypervisor by
2020 Jul 24
86
[PATCH v5 00/75] x86: SEV-ES Guest Support
From: Joerg Roedel <jroedel at suse.de>
Hi,
here is a rebased version of the latest SEV-ES patches. They are now
based on latest tip/master instead of upstream Linux and include the
necessary changes.
Changes to v4 are in particular:
- Moved early IDT setup code to idt.c, because the idt_descr
and the idt_table are now static
- This required to make stack protector work early (or
2020 Jul 14
92
[PATCH v4 00/75] x86: SEV-ES Guest Support
From: Joerg Roedel <jroedel at suse.de>
Hi,
here is the fourth version of the SEV-ES Guest Support patches. I
addressed the review comments sent to me for the previous version and
rebased the code v5.8-rc5.
The biggest change in this version is the IST handling code for the
#VC handler. I adapted the entry code for the #VC handler to the big
pile of entry code changes merged into
2020 Jul 14
92
[PATCH v4 00/75] x86: SEV-ES Guest Support
From: Joerg Roedel <jroedel at suse.de>
Hi,
here is the fourth version of the SEV-ES Guest Support patches. I
addressed the review comments sent to me for the previous version and
rebased the code v5.8-rc5.
The biggest change in this version is the IST handling code for the
#VC handler. I adapted the entry code for the #VC handler to the big
pile of entry code changes merged into
2020 Aug 24
96
[PATCH v6 00/76] x86: SEV-ES Guest Support
From: Joerg Roedel <jroedel at suse.de>
Hi,
here is the new version of the SEV-ES client enabling patch-set. It is
based on the latest tip/master branch and contains the necessary
changes. In particular those ar:
- Enabling CR4.FSGSBASE early on supported processors so that
early #VC exceptions on APs can be handled.
- Add another patch (patch 1) to fix a KVM frame-size build
2020 Sep 07
84
[PATCH v7 00/72] x86: SEV-ES Guest Support
From: Joerg Roedel <jroedel at suse.de>
Hi,
here is a new version of the SEV-ES Guest Support patches for x86. The
previous versions can be found as a linked list starting here:
https://lore.kernel.org/lkml/20200824085511.7553-1-joro at 8bytes.org/
I updated the patch-set based on ther review comments I got and the
discussions around it.
Another important change is that the early IDT