Displaying 4 results from an estimated 4 matches for "x86_cr4_smxe".
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x86_cr4_mce
2013 Aug 23
2
[PATCH] Nested VMX: Allow to set CR4.OSXSAVE if guest has xsave feature
...+ /* Allow to set OSXSAVE if guest has xsave feature. */
+ hvm_cpuid(0x1, &eax, &ebx, &ecx, &edx);
+ if ( ecx & cpufeat_mask(X86_FEATURE_XSAVE) )
+ data |= X86_CR4_OSXSAVE;
/* allow 0-settings except SMXE */
- data = 0x267ff & ~X86_CR4_SMXE;
+ data &= ~X86_CR4_SMXE;
break;
case MSR_IA32_VMX_MISC:
/* Do not support CR3-target feature now */
--
1.7.1
2011 Nov 24
0
[PATCH 6/6] X86: implement PCID/INVPCID for hvm
...* Interruption-information format
diff -r c61a5ba8c972 xen/include/asm-x86/processor.h
--- a/xen/include/asm-x86/processor.h Tue Nov 22 02:47:51 2011 +0800
+++ b/xen/include/asm-x86/processor.h Tue Nov 22 16:15:19 2011 +0800
@@ -84,6 +84,7 @@
#define X86_CR4_VMXE 0x2000 /* enable VMX */
#define X86_CR4_SMXE 0x4000 /* enable SMX */
#define X86_CR4_FSGSBASE 0x10000 /* enable {rd,wr}{fs,gs}base */
+#define X86_CR4_PCIDE 0x20000 /* enable PCID */
#define X86_CR4_OSXSAVE 0x40000 /* enable XSAVE/XRSTOR */
#define X86_CR4_SMEP 0x100000/* enable SMEP */
______________________________________________...
2013 Sep 23
11
[PATCH v4 0/4] x86/HVM: miscellaneous improvements
The first and third patches are cleaned up versions of an earlier v3
submission by Yang.
1: Nested VMX: check VMX capability before read VMX related MSRs
2: VMX: clean up capability checks
3: Nested VMX: fix IA32_VMX_CR4_FIXED1 msr emulation
4: x86: make hvm_cpuid() tolerate NULL pointers
Signed-off-by: Jan Beulich <jbeulich@suse.com>
2013 Jan 07
9
[PATCH v2 0/3] nested vmx bug fixes
Changes from v1 to v2:
- Use a macro to replace the hardcode in patch 1/3.
This patchset fixes issues about IA32_VMX_MISC MSR emulation, VMCS guest area
synchronization about PAGE_FAULT_ERROR_CODE_MASK/PAGE_FAULT_ERROR_CODE_MATCH,
and CR0/CR4 emulation.
Please help to review and pull.
Thanks,
Dongxiao
Dongxiao Xu (3):
nested vmx: emulate IA32_VMX_MISC MSR
nested vmx: synchronize page