Displaying 4 results from an estimated 4 matches for "x86_cr4_smep".
2013 Oct 10
10
[PATCH 0/4] x86: XSA-67 follow-up
1: correct LDT checks
2: add address validity check to guest_map_l1e()
3: use {rd,wr}{fs,gs}base when available
4: check for canonical address before doing page walks
Signed-off-by: Jan Beulich <jbeulich@suse.com>
2011 Nov 24
0
[PATCH 6/6] X86: implement PCID/INVPCID for hvm
...000H");
+ goto gpf;
+ }
+
v->arch.hvm_vcpu.guest_cr[4] = value;
hvm_update_guest_cr(v, 4);
- /* Modifying CR4.{PSE,PAE,PGE,SMEP} invalidates all TLB entries. */
- if ( (old_cr ^ value) & (X86_CR4_PSE | X86_CR4_PGE |
- X86_CR4_PAE | X86_CR4_SMEP) ) {
+ /*
+ * Modifying CR4.{PSE,PAE,PGE,SMEP}, or clearing CR4.PCIDE
+ * invalidate all TLB entries.
+ */
+ if ( ((old_cr ^ value) &
+ (X86_CR4_PSE | X86_CR4_PGE | X86_CR4_PAE | X86_CR4_SMEP)) ||
+ (!(value & X86_CR4_PCIDE) && (old_cr & X...
2013 Aug 23
2
[PATCH] Nested VMX: Allow to set CR4.OSXSAVE if guest has xsave feature
From: Yang Zhang <yang.z.zhang@Intel.com>
We exposed the xsave feature to guest, but we didn''t allow guest
to set CR4.OSXSAVE when guest running in nested mode. This will
cause win 7 guest fail to use XP mode. In this patch, we allow guest
to set CR4.OSXSAVE in nested mode when it has the xsave feature.
Signed-off-by: Yang Zhang <yang.z.zhang@Intel.com>
---
2013 Sep 23
11
[PATCH v4 0/4] x86/HVM: miscellaneous improvements
The first and third patches are cleaned up versions of an earlier v3
submission by Yang.
1: Nested VMX: check VMX capability before read VMX related MSRs
2: VMX: clean up capability checks
3: Nested VMX: fix IA32_VMX_CR4_FIXED1 msr emulation
4: x86: make hvm_cpuid() tolerate NULL pointers
Signed-off-by: Jan Beulich <jbeulich@suse.com>