Displaying 14 results from an estimated 14 matches for "x86_cr4_pae".
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x86_cr0_pe
2013 Sep 22
1
[PATCH] Nested VMX: Expose unrestricted guest feature to guest
.../x86/hvm/hvm.c
index 7203184..481cb71 100644
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -1732,7 +1732,8 @@ int hvm_set_cr0(unsigned long value)
{
if ( v->arch.hvm_vcpu.guest_efer & EFER_LME )
{
- if ( !(v->arch.hvm_vcpu.guest_cr[4] & X86_CR4_PAE) )
+ if ( !(v->arch.hvm_vcpu.guest_cr[4] & X86_CR4_PAE) &&
+ !nestedhvm_vmswitch_in_progress(v) )
{
HVM_DBG_LOG(DBG_LEVEL_1, "Enable paging before PAE enable");
goto gpf;
diff --git a/xen/arch/x86/hvm...
2006 May 05
6
PAE mode mismatch in Xen (xen=no Dom0=yes)
...my system and wanted Xen to see that memory, so enabled PAE in xen0 and XenU. I did a make menuconfig in xen0 and xenU, then did a make in xen-unstable and a make install.
Whilebooting this kernel, I get the above error PAE mode mismatch. I looked under xen/include/asm-x86/processor.h has #define X86_CR4_PAE defined and so does cpufeature.h have this defined. #define X86_FEATURE_PAE
What else should I have done to enable a PAE enabled Xen kernel. I am using xen 3.0.0 (xen-unstable) and cannot move to 3.02 due to xenoprofile not ready there
Thanks
- Padma
_________________________________________...
2011 Nov 24
0
[PATCH 6/6] X86: implement PCID/INVPCID for hvm
...or CR3[11:0]!=000H");
+ goto gpf;
+ }
+
v->arch.hvm_vcpu.guest_cr[4] = value;
hvm_update_guest_cr(v, 4);
- /* Modifying CR4.{PSE,PAE,PGE,SMEP} invalidates all TLB entries. */
- if ( (old_cr ^ value) & (X86_CR4_PSE | X86_CR4_PGE |
- X86_CR4_PAE | X86_CR4_SMEP) ) {
+ /*
+ * Modifying CR4.{PSE,PAE,PGE,SMEP}, or clearing CR4.PCIDE
+ * invalidate all TLB entries.
+ */
+ if ( ((old_cr ^ value) &
+ (X86_CR4_PSE | X86_CR4_PGE | X86_CR4_PAE | X86_CR4_SMEP)) ||
+ (!(value & X86_CR4_PCIDE) &&...
2007 Mar 22
2
[PATCH][HAP][2/2] fix CR4 initialization when hap is on
This patch initializes VMCB CR4 and shadow CR4 with 0 when VMCB is being
constructed under nested paging mode. It complies with recent
reset_to_realmode change in hvmloader.
Signed-off-by: Wei Huang (wei.huang2@amd.com <mailto:wei.huang2@amd.com>
)
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xensource.com
2007 Apr 18
2
[PATCH] Clean up x86 control register and MSR macros (corrected)
...nable vm86 extensions */
+#define X86_CR4_PVI 0x00000002 /* virtual interrupts flag enable */
+#define X86_CR4_TSD 0x00000004 /* disable time stamp at ipl 3 */
+#define X86_CR4_DE 0x00000008 /* enable debugging extensions */
+#define X86_CR4_PSE 0x00000010 /* enable page size extensions */
+#define X86_CR4_PAE 0x00000020 /* enable physical address extensions */
+#define X86_CR4_MCE 0x00000040 /* Machine check enable */
+#define X86_CR4_PGE 0x00000080 /* enable global pages */
+#define X86_CR4_PCE 0x00000100 /* enable performance counters at ipl 3 */
+#define X86_CR4_OSFXSR 0x00000200 /* enable fast FPU s...
2007 Apr 18
2
[PATCH] Clean up x86 control register and MSR macros (corrected)
...nable vm86 extensions */
+#define X86_CR4_PVI 0x00000002 /* virtual interrupts flag enable */
+#define X86_CR4_TSD 0x00000004 /* disable time stamp at ipl 3 */
+#define X86_CR4_DE 0x00000008 /* enable debugging extensions */
+#define X86_CR4_PSE 0x00000010 /* enable page size extensions */
+#define X86_CR4_PAE 0x00000020 /* enable physical address extensions */
+#define X86_CR4_MCE 0x00000040 /* Machine check enable */
+#define X86_CR4_PGE 0x00000080 /* enable global pages */
+#define X86_CR4_PCE 0x00000100 /* enable performance counters at ipl 3 */
+#define X86_CR4_OSFXSR 0x00000200 /* enable fast FPU s...
2007 Apr 18
1
No subject
...nable vm86 extensions */
+#define X86_CR4_PVI 0x00000002 /* virtual interrupts flag enable */
+#define X86_CR4_TSD 0x00000004 /* disable time stamp at ipl 3 */
+#define X86_CR4_DE 0x00000008 /* enable debugging extensions */
+#define X86_CR4_PSE 0x00000010 /* enable page size extensions */
+#define X86_CR4_PAE 0x00000020 /* enable physical address extensions */
+#define X86_CR4_MCE 0x00000040 /* Machine check enable */
+#define X86_CR4_PGE 0x00000080 /* enable global pages */
+#define X86_CR4_PCE 0x00000100 /* enable performance counters at ipl 3 */
+#define X86_CR4_OSFXSR 0x00000200 /* enable fast FPU s...
2007 Apr 18
1
No subject
...nable vm86 extensions */
+#define X86_CR4_PVI 0x00000002 /* virtual interrupts flag enable */
+#define X86_CR4_TSD 0x00000004 /* disable time stamp at ipl 3 */
+#define X86_CR4_DE 0x00000008 /* enable debugging extensions */
+#define X86_CR4_PSE 0x00000010 /* enable page size extensions */
+#define X86_CR4_PAE 0x00000020 /* enable physical address extensions */
+#define X86_CR4_MCE 0x00000040 /* Machine check enable */
+#define X86_CR4_PGE 0x00000080 /* enable global pages */
+#define X86_CR4_PCE 0x00000100 /* enable performance counters at ipl 3 */
+#define X86_CR4_OSFXSR 0x00000200 /* enable fast FPU s...
2007 Jun 27
0
[PATCH 1/10] Provide basic Xen PM infrastructure
...m_phys(trampoline_xen_phys_start), %eax
+ mov (%eax), %eax
+ cmp $0x9abcdef0, %eax
+ jne bogus_saved_magic
+
+ /* fpu init? */
+
+ /* Initialise CR4. */
+#if CONFIG_PAGING_LEVELS == 2
+ mov $X86_CR4_PSE, %ecx
+#else
+ mov $X86_CR4_PAE, %ecx
+#endif
+ mov %ecx, %cr4
+
+ /* Load pagetable base register */
+ mov $sym_phys(idle_pg_table),%eax
+ add bootsym_phys(trampoline_xen_phys_start),%eax
+ mov %eax,%cr3
+
+ /* Will cpuid feature change after resume? */
+#if CONFIG_PAGING...
2013 Sep 23
11
[PATCH v4 0/4] x86/HVM: miscellaneous improvements
The first and third patches are cleaned up versions of an earlier v3
submission by Yang.
1: Nested VMX: check VMX capability before read VMX related MSRs
2: VMX: clean up capability checks
3: Nested VMX: fix IA32_VMX_CR4_FIXED1 msr emulation
4: x86: make hvm_cpuid() tolerate NULL pointers
Signed-off-by: Jan Beulich <jbeulich@suse.com>
2013 Sep 23
57
[PATCH RFC v13 00/20] Introduce PVH domU support
This patch series is a reworking of a series developed by Mukesh
Rathor at Oracle. The entirety of the design and development was done
by him; I have only reworked, reorganized, and simplified things in a
way that I think makes more sense. The vast majority of the credit
for this effort therefore goes to him. This version is labelled v13
because it is based on his most recent series, v11.
2012 Nov 20
12
[PATCH v2 00/11] xen: Initial kexec/kdump implementation
Hi,
This set of patches contains initial kexec/kdump implementation for Xen v2
(previous version were posted to few people by mistake; sorry for that).
Currently only dom0 is supported, however, almost all infrustructure
required for domU support is ready.
Jan Beulich suggested to merge Xen x86 assembler code with baremetal x86 code.
This could simplify and reduce a bit size of kernel code.
2012 Nov 20
12
[PATCH v2 00/11] xen: Initial kexec/kdump implementation
Hi,
This set of patches contains initial kexec/kdump implementation for Xen v2
(previous version were posted to few people by mistake; sorry for that).
Currently only dom0 is supported, however, almost all infrustructure
required for domU support is ready.
Jan Beulich suggested to merge Xen x86 assembler code with baremetal x86 code.
This could simplify and reduce a bit size of kernel code.
2012 Nov 20
12
[PATCH v2 00/11] xen: Initial kexec/kdump implementation
Hi,
This set of patches contains initial kexec/kdump implementation for Xen v2
(previous version were posted to few people by mistake; sorry for that).
Currently only dom0 is supported, however, almost all infrustructure
required for domU support is ready.
Jan Beulich suggested to merge Xen x86 assembler code with baremetal x86 code.
This could simplify and reduce a bit size of kernel code.