Displaying 2 results from an estimated 2 matches for "writing_polici".
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writing_policies
2018 Nov 01
3
RFC: System (cache, etc.) model for LLVM
...dled at all. Any architecture that supports
big.LITTLE will return 0 on getCacheLineSize(). See
AArch64Subtarget::initializeProperties().
> > * write-back / write-through write buffers
>
> Do you mean for caches, or something else?
https://en.wikipedia.org/wiki/Cache_%28computing%29#Writing_policies
Basically, with write-though, every store is a non-temporal store (Or
temporal stores being a write-through, depending on how to view it)
> >> class TargetSoftwarePrefetcherInfo {
> >> /// Should we do software prefetching at all?
> >> ///
> >>...
2018 Nov 01
2
RFC: System (cache, etc.) model for LLVM
Hi,
thank you for sharing the system hierarchy model. IMHO it makes a lot
of sense, although I don't know which of today's passes would make use
of it. Here are my remarks.
I am wondering how one could model the following features using this
model, or whether they should be part of a performance model at all:
* ARM's big.LITTLE
* NUMA hierarchies (are the NUMA domains