Displaying 4 results from an estimated 4 matches for "writeonlyregclass".
2005 Jul 22
2
[LLVMdev] How to partition registers into different RegisterClass?
...t I can easy define the
instruction?
All RegisterClasses must be mutally exclusive. That is, a register can
only be in a RegisterClass. Otherwise TableGen will raise an error
message.
def ReadOnlyRegClass : RegisterClass<...>;
def GeneralPurposeRegClass : RegisterClass<...>;
def WriteOnlyRegClass : RegisterClass<...>;
def MOV : BinaryInst<2, (ops GeneralPurposeRegClass :$dest,
GeneralPurposeRegClass :$src), "mov $dest, $src">;
There can be only one RegisterClass defined for each instruction
operand, but actually the destition operand could be
'GeneralPurposeReg...
2005 Jul 22
0
[LLVMdev] How to partition registers into different RegisterClass?
...yInst<2, (ops GeneralPurposeRegClass :$dest,
> GeneralPurposeRegClass :$src), "mov $dest, $src">;
>
> There can be only one RegisterClass defined for each instruction
> operand, but actually the destition operand could be
> 'GeneralPurposeRegClass ' or 'WriteOnlyRegClass ', and the source
> operand can be 'ReadOnlyRegClass' or 'GeneralPurposeRegClass'.
Presumably, when you write your instruction selector, you know when you
want to have a write-only vs. general purpose and read-only vs. general
purpose register. Some things are naturally rea...
2005 Jul 22
2
[LLVMdev] How to partition registers into different RegisterClass?
...PurposeRegClass :$dest,
> > GeneralPurposeRegClass :$src), "mov $dest, $src">;
> >
> > There can be only one RegisterClass defined for each instruction
> > operand, but actually the destition operand could be
> > 'GeneralPurposeRegClass ' or 'WriteOnlyRegClass ', and the source
> > operand can be 'ReadOnlyRegClass' or 'GeneralPurposeRegClass'.
>
> Presumably, when you write your instruction selector, you know when you
> want to have a write-only vs. general purpose and read-only vs. general
> purpose register. Some...
2005 Jul 22
0
[LLVMdev] How to partition registers into different RegisterClass?
...:$dest,
>>> GeneralPurposeRegClass :$src), "mov $dest, $src">;
>>>
>>> There can be only one RegisterClass defined for each instruction
>>> operand, but actually the destition operand could be
>>> 'GeneralPurposeRegClass ' or 'WriteOnlyRegClass ', and the source
>>> operand can be 'ReadOnlyRegClass' or 'GeneralPurposeRegClass'.
>>
>> Presumably, when you write your instruction selector, you know when you
>> want to have a write-only vs. general purpose and read-only vs. general
>> purpo...