search for: writebrtbl

...o for a tBL instruction. Needed to let regalloc know about // the clobber of LR. let Defs = [LR] in def tBfar : tPseudoExpand<(outs), (ins t_bltarget:$target, pred:$p), 4, IIC_Br, [], (tBL pred:$p, t_bltarget:$target)>, Sched<[WriteBrTbl]>; Are you expecting LR to be saved because of this Defs? This is all happening way after register allocation and prologue generation. This is an unusual situation where LR would not have been saved but it's possible to have this and then you will not return from the function. >> A...

On Nov 18, 2013, at 3:49 PM, reed kotler <rkotler at mips.com> wrote: > I don't know ARM hardly at all but... > > This comment does not seem to match the code. > Or maybe tBfar is a BL? What does the definition of tBfar say? > > Also, how does this work if the destination is greater than 2**21? > It doesn’t. IIRC, that’s under the category of “if people start

I don't know ARM hardly at all but... This comment does not seem to match the code. Or maybe tBfar is a BL? Also, how does this work if the destination is greater than 2**21? /// fixupUnconditionalBr - Fix up an unconditional branch whose destination is /// too far away to fit in its displacement field. If the LR register has been /// spilled in the epilogue, then we can use BL to