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...;, ref.str().c_str(), d.SchedClass); > > printf("microops %d\n", llvm::ThunderX2T99Model.getSchedClassDesc(d.SchedClass)->NumMicroOps); > > return 0; > } > > /* > LDADDALB_LDADDALH_LDADDALW_LDADDALX = 872, in Sched enum > */ I bet the problem is that “WriteAtomic” is marked unsupported, so it gets an invalid sched class. The invalid NumMicroOps means that the scheduler will assert if it ever sees that instruction. def : WriteRes<WriteAtomic, []> { let Unsupported = 1; let NumMicroOps = 2; } def : InstRW<[THX2T99Write_16Cyc_I012, WriteAtomi...

Hi all, I am looking at the scheduling model of the ThunderX2. I am trying to figure out the cost of the LDADDALX instruction. The following program’s output is: name LDADDALX; class 872 microops 65535 I would have assumed that the microops are less than 20. The ThunderX2 has a detailed cost model for LSE. Could somebody tell me what I am doing wrong? Cheers, Tom #define GET_REGINFO_ENUM

...printf("microops %d\n", llvm::ThunderX2T99Model.getSchedClassDesc(d. > SchedClass)->NumMicroOps); > > > > return 0; > > } > > > > /* > > LDADDALB_LDADDALH_LDADDALW_LDADDALX = 872, in Sched enum > > */ > > I bet the problem is that “WriteAtomic” is marked unsupported, so it gets > an invalid sched class. The invalid NumMicroOps means that the scheduler > will assert if it ever sees that instruction. > > ​The scheduler does not assert if it sees LDADDAL, or any other of the LSE instructions on ThunderX2. We've been genera...

...tChain, SuccessOrder, Scope, false, dl, DAG, *TLI); setValue(&I, L); diff --git a/lib/IR/AsmWriter.cpp b/lib/IR/AsmWriter.cpp index 8a25ff8..22fa969 100644 --- a/lib/IR/AsmWriter.cpp +++ b/lib/IR/AsmWriter.cpp @@ -1226,6 +1226,37 @@ void AssemblyWriter::writeAtomic(AtomicOrdering Ordering, } } +void AssemblyWriter::writeAtomicCmpXchg(AtomicOrdering SuccessOrdering, + AtomicOrdering FailureOrdering, + SynchronizationScope SynchScope) { + assert(SuccessOrdering != NotAtomic &...