search for: write_ptbase

...id/vpid, so the older vcpu.vpid tlb entries will just not be used. However, I don''t understand the use of hvm_asid_flush_core which it appears will cause all HVM vcpu''s to get new vpid/asid, hence, discard all previously used VPID tagged TLBs. In particular, consider a PV guest: write_ptbase -> write_cr3 -> hvm_flush_guest_tlbs -> hvm_asid_flush_core(). Since the PV guest is only using VPID 0 tagged TLBs, why do we need to flush all TLBs for all HVM guests? thanks Mukesh

...mfn = pagetable_get_mfn(v->arch.monitor_table); @@ -2590,7 +2588,8 @@ static void sh_update_paging_modes(struc * pull it down! Switch CR3, and warn the HVM code that * its host cr3 has changed. */ make_cr3(v, mfn_x(new_mfn)); - write_ptbase(v); + if ( v == current ) + write_ptbase(v); hvm_update_host_cr3(v); old_mode->destroy_monitor_table(v, old_mfn); } _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.c...

Hi, V6: The only change from V5 is in patch #6: - changed comment to reflect autoxlate - removed a redundant ASSERT - reworked logic a bit so that get_page_from_gfn() is called with NULL for p2m type as before. arm has ASSERT wanting it to be NULL. Tim: patch 4 needs your approval. Daniel: patch 5 needs your approval. These patches implement PVH dom0. Patches 1 and 2