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Hi, testing for bounce mails. suddenly xen-devel started bouncing my mails back saying somebody forged by email to them ... :-( uh... if anybody gets this , please hit a reply privately. Thanks a ton ~psr -- --- pradeep singh rautela "Genius is 1% inspiration, and 99% perspiration" - not me :) _______________________________________________ Xen-devel mailing list

Hello, This series of patches integrates msr.h header. What it really does, is a series of steps to allow us to get rid of duplicate code between i386 and x86_64 versions With this done, achieving paravirt for x86_64 gets really easy, just a couple of extra code. The first patch was already sent a while ago, but was not yet pushed to any tree , to my knowledge. So it is sent again. Also,

Hello, This series of patches integrates msr.h header. What it really does, is a series of steps to allow us to get rid of duplicate code between i386 and x86_64 versions With this done, achieving paravirt for x86_64 gets really easy, just a couple of extra code. The first patch was already sent a while ago, but was not yet pushed to any tree , to my knowledge. So it is sent again. Also,

...ypes.h b/arch/x86/include/asm/paravirt_types.h > index a6b8f9fadb06..ce029e4fa7c6 100644 > --- a/arch/x86/include/asm/paravirt_types.h > +++ b/arch/x86/include/asm/paravirt_types.h > @@ -156,9 +156,7 @@ struct pv_cpu_ops { > u64 (*read_msr)(unsigned int msr, int *err); > int (*write_msr)(unsigned int msr, unsigned low, unsigned high); > > - u64 (*read_tsc)(void); > u64 (*read_pmc)(int counter); > - unsigned long long (*read_tscp)(unsigned int *aux); > > #ifdef CONFIG_X86_32 > /* > diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c...

...ypes.h b/arch/x86/include/asm/paravirt_types.h > index a6b8f9fadb06..ce029e4fa7c6 100644 > --- a/arch/x86/include/asm/paravirt_types.h > +++ b/arch/x86/include/asm/paravirt_types.h > @@ -156,9 +156,7 @@ struct pv_cpu_ops { > u64 (*read_msr)(unsigned int msr, int *err); > int (*write_msr)(unsigned int msr, unsigned low, unsigned high); > > - u64 (*read_tsc)(void); > u64 (*read_pmc)(int counter); > - unsigned long long (*read_tscp)(unsigned int *aux); > > #ifdef CONFIG_X86_32 > /* > diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c...

...dex 19a3e8f961c7..3fead3a50723 100644 --- a/arch/x86/kernel/paravirt.c +++ b/arch/x86/kernel/paravirt.c @@ -332,7 +332,6 @@ __visible struct pv_cpu_ops pv_cpu_ops = { .read_cr8 = native_read_cr8, .write_cr8 = native_write_cr8, #endif - .wbinvd = native_wbinvd, .read_msr = native_read_msr, .write_msr = native_write_msr, .read_msr_safe = native_read_msr_safe, diff --git a/arch/x86/kernel/paravirt_patch_64.c b/arch/x86/kernel/paravirt_patch_64.c index 11aaf1eaa0e4..0a1ba3f80cbf 100644 --- a/arch/x86/kernel/paravirt_patch_64.c +++ b/arch/x86/kernel/paravirt_patch_64.c @@ -10,7 +10,6 @@ DEF_NATIV...

...ead_cr4, + .write_cr4 = native_write_cr4, + .save_fl = native_save_fl, + .restore_fl = native_restore_fl, + .irq_disable = native_irq_disable, + .irq_enable = native_irq_enable, + .safe_halt = native_safe_halt, + .halt = native_halt, + .wbinvd = native_wbinvd, + .read_msr = native_read_msr_safe, + .write_msr = native_write_msr_safe, + .read_tsc = native_read_tsc, + .read_tscp = native_read_tscp, + .read_pmc = native_read_pmc, + .load_tr_desc = native_load_tr_desc, + .set_ldt = native_set_ldt, + .load_gdt = native_load_gdt, + .load_idt = native_load_idt, + .store_gdt = native_store_gdt, + .store_idt = n...

...ead_cr4, + .write_cr4 = native_write_cr4, + .save_fl = native_save_fl, + .restore_fl = native_restore_fl, + .irq_disable = native_irq_disable, + .irq_enable = native_irq_enable, + .safe_halt = native_safe_halt, + .halt = native_halt, + .wbinvd = native_wbinvd, + .read_msr = native_read_msr_safe, + .write_msr = native_write_msr_safe, + .read_tsc = native_read_tsc, + .read_tscp = native_read_tscp, + .read_pmc = native_read_pmc, + .load_tr_desc = native_load_tr_desc, + .set_ldt = native_set_ldt, + .load_gdt = native_load_gdt, + .load_idt = native_load_idt, + .store_gdt = native_store_gdt, + .store_idt = n...

..._ex_table,\"a\"\n" + " .align 4\n\t" + " .long 2b,3b\n\t" + ".previous" + : "=r" (*err), "=A" (val) + : "c" (msr), "i" (-EFAULT)); + + return val; +} + +static fastcall int nopara_write_msr(unsigned int msr, unsigned long long val) +{ + int err; + asm volatile("2: wrmsr ; xorl %0,%0\n" + "1:\n\t" + ".section .fixup,\"ax\"\n\t" + "3: movl %4,%0 ; jmp 1b\n\t" + ".previous\n\t" + ".section __...

..._ex_table,\"a\"\n" + " .align 4\n\t" + " .long 2b,3b\n\t" + ".previous" + : "=r" (*err), "=A" (val) + : "c" (msr), "i" (-EFAULT)); + + return val; +} + +static fastcall int nopara_write_msr(unsigned int msr, unsigned long long val) +{ + int err; + asm volatile("2: wrmsr ; xorl %0,%0\n" + "1:\n\t" + ".section .fixup,\"ax\"\n\t" + "3: movl %4,%0 ; jmp 1b\n\t" + ".previous\n\t" + ".section __...

...void (fastcall *irq_disable)(void); + void (fastcall *irq_enable)(void); + void (fastcall *safe_halt)(void); + void (fastcall *halt)(void); + void (fastcall *wbinvd)(void); + + /* err = 0/-EFAULT. wrmsr returns 0/-EFAULT. */ + u64 (fastcall *read_msr)(unsigned int msr, int *err); + int (fastcall *write_msr)(unsigned int msr, u64 val); + + u64 (fastcall *read_tsc)(void); + u64 (fastcall *read_pmc)(void); + + void (fastcall *load_tr_desc)(void); + void (fastcall *load_ldt_desc)(void); + void (fastcall *load_gdt)(const struct Xgt_desc_struct *); + void (fastcall *load_idt)(const struct Xgt_desc_struct *...

...sizeof(pgd_t) * PTRS_PER_PGD, + .swapgs = { + .ret = 0, + .fn = native_swapgs, + }, + .vsyscall_page = &__vsyscall_0, .patch = native_patch, .banner = default_banner, .arch_setup = native_nop, @@ -512,6 +529,7 @@ struct paravirt_ops paravirt_ops = { .read_msr = native_read_msr, .write_msr = native_write_msr, .read_tsc = native_read_tsc, + .read_tscp = native_read_tscp, .read_pmc = native_read_pmc, .load_tr_desc = native_load_tr_desc, .set_ldt = native_set_ldt, @@ -571,7 +589,7 @@ struct paravirt_ops paravirt_ops = { .make_pud = native_make_pud, .make_pgd = native_make_pg...

...sizeof(pgd_t) * PTRS_PER_PGD, + .swapgs = { + .ret = 0, + .fn = native_swapgs, + }, + .vsyscall_page = &__vsyscall_0, .patch = native_patch, .banner = default_banner, .arch_setup = native_nop, @@ -512,6 +529,7 @@ struct paravirt_ops paravirt_ops = { .read_msr = native_read_msr, .write_msr = native_write_msr, .read_tsc = native_read_tsc, + .read_tscp = native_read_tscp, .read_pmc = native_read_pmc, .load_tr_desc = native_load_tr_desc, .set_ldt = native_set_ldt, @@ -571,7 +589,7 @@ struct paravirt_ops paravirt_ops = { .make_pud = native_make_pud, .make_pgd = native_make_pg...

...r4_safe, - .write_cr4 = native_write_cr4, - .save_fl = native_save_fl, - .restore_fl = native_restore_fl, - .irq_disable = native_irq_disable, - .irq_enable = native_irq_enable, - .safe_halt = native_safe_halt, - .halt = native_halt, - .wbinvd = native_wbinvd, - .read_msr = native_read_msr_safe, - .write_msr = native_write_msr_safe, - .read_tsc = native_read_tsc, - .read_pmc = native_read_pmc, - .sched_clock = native_sched_clock, - .get_cpu_khz = native_calculate_cpu_khz, - .load_tr_desc = native_load_tr_desc, - .set_ldt = native_set_ldt, - .load_gdt = native_load_gdt, - .load_idt = native_load_idt, -...

...r4_safe, - .write_cr4 = native_write_cr4, - .save_fl = native_save_fl, - .restore_fl = native_restore_fl, - .irq_disable = native_irq_disable, - .irq_enable = native_irq_enable, - .safe_halt = native_safe_halt, - .halt = native_halt, - .wbinvd = native_wbinvd, - .read_msr = native_read_msr_safe, - .write_msr = native_write_msr_safe, - .read_tsc = native_read_tsc, - .read_pmc = native_read_pmc, - .sched_clock = native_sched_clock, - .get_cpu_khz = native_calculate_cpu_khz, - .load_tr_desc = native_load_tr_desc, - .set_ldt = native_set_ldt, - .load_gdt = native_load_gdt, - .load_idt = native_load_idt, -...

...r4_safe, - .write_cr4 = native_write_cr4, - .save_fl = native_save_fl, - .restore_fl = native_restore_fl, - .irq_disable = native_irq_disable, - .irq_enable = native_irq_enable, - .safe_halt = native_safe_halt, - .halt = native_halt, - .wbinvd = native_wbinvd, - .read_msr = native_read_msr_safe, - .write_msr = native_write_msr_safe, - .read_tsc = native_read_tsc, - .read_pmc = native_read_pmc, - .sched_clock = native_sched_clock, - .get_cpu_khz = native_calculate_cpu_khz, - .load_tr_desc = native_load_tr_desc, - .set_ldt = native_set_ldt, - .load_gdt = native_load_gdt, - .load_idt = native_load_idt, -...

...r4_safe, - .write_cr4 = native_write_cr4, - .save_fl = native_save_fl, - .restore_fl = native_restore_fl, - .irq_disable = native_irq_disable, - .irq_enable = native_irq_enable, - .safe_halt = native_safe_halt, - .halt = native_halt, - .wbinvd = native_wbinvd, - .read_msr = native_read_msr_safe, - .write_msr = native_write_msr_safe, - .read_tsc = native_read_tsc, - .read_pmc = native_read_pmc, - .sched_clock = native_sched_clock, - .get_cpu_khz = native_calculate_cpu_khz, - .load_tr_desc = native_load_tr_desc, - .set_ldt = native_set_ldt, - .load_gdt = native_load_gdt, - .load_idt = native_load_idt, -...

...r4_safe, - .write_cr4 = native_write_cr4, - .save_fl = native_save_fl, - .restore_fl = native_restore_fl, - .irq_disable = native_irq_disable, - .irq_enable = native_irq_enable, - .safe_halt = native_safe_halt, - .halt = native_halt, - .wbinvd = native_wbinvd, - .read_msr = native_read_msr_safe, - .write_msr = native_write_msr_safe, - .read_tsc = native_read_tsc, - .read_pmc = native_read_pmc, - .sched_clock = native_sched_clock, - .get_cpu_khz = native_calculate_cpu_khz, - .load_tr_desc = native_load_tr_desc, - .set_ldt = native_set_ldt, - .load_gdt = native_load_gdt, - .load_idt = native_load_idt, -...

...r4_safe, - .write_cr4 = native_write_cr4, - .save_fl = native_save_fl, - .restore_fl = native_restore_fl, - .irq_disable = native_irq_disable, - .irq_enable = native_irq_enable, - .safe_halt = native_safe_halt, - .halt = native_halt, - .wbinvd = native_wbinvd, - .read_msr = native_read_msr_safe, - .write_msr = native_write_msr_safe, - .read_tsc = native_read_tsc, - .read_pmc = native_read_pmc, - .sched_clock = native_sched_clock, - .get_cpu_khz = native_calculate_cpu_khz, - .load_tr_desc = native_load_tr_desc, - .set_ldt = native_set_ldt, - .load_gdt = native_load_gdt, - .load_idt = native_load_idt, -...

Chris said, and I agree, that we should try to get the basic PV-ops infrastructure stuff into 2.6.19. To me this means being able to run a kernel native with CONFIG_PARAVIRT, and see little or no functional or performance degradation. What do we need to do to get there: * fix the slowdown bug, which seems to be something to do with rdmsr/wrmsr on SMP systems * work out how to