Displaying 3 results from an estimated 3 matches for "widestregisters".
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2018 Jul 24
2
KNL Vectorization with larger vector width
Hello,
I need help here. I am able to adjust the vector width through
WidestRegister value. When number of iterations=31 and I set vector
width=32 it gives <16xi32> and <8xi32> instructions.
However if i replicate same behavior with number of iterations=63 and I
set vector width=64, no vector instructions are emitted. it should do as
previous and gives <32xi32> and
2018 Jul 23
2
KNL Vectorization with larger vector width
Thank You.
But I cannot find your mentioned function
LoopVectorizationCostModel::computeFeasibleMaxVF(bool
OptForSize, unsigned ConstTripCount). I am using LLVM 4. I have been trying
to get the required code portion in LoopVectorize.cpp file. But I am unable
to debug this. each time i debug it, it returns me vectorized IR in gdb.
My goal is simple when i mention my target name in opt it should
2018 Jul 24
2
KNL Vectorization with larger vector width
Thank You.
Right now to see the effect i did following changes;
unsigned X86TTIImpl::getRegisterBitWidth(bool Vector) {
if (Vector) {
if (ST->hasAVX512())
return 65536;
here i changed 512 to 65536. Then in loopvectorize.cpp i did following;
assert(MaxVectorSize <= 2048 && "Did not expect to pack so many elements"
" into