search for: widenvt

Displaying 9 results from an estimated 9 matches for "widenvt".

2009 May 21
0
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
On Wed, May 20, 2009 at 4:55 PM, Dan Gohman <gohman at apple.com> wrote: > Can you explain why you chose the approach of using a new pass? > I pictured removing LegalizeDAG's type legalization code would > mostly consist of finding all the places that use TLI.getTypeAction > and just deleting code for handling its Expand and Promote. Are you > anticipating something more
2009 May 20
2
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
On May 20, 2009, at 1:34 PM, Eli Friedman wrote: > On Wed, May 20, 2009 at 1:19 PM, Eli Friedman > <eli.friedman at gmail.com> wrote: > >> Per subject, this patch adding an additional pass to handle vector >> >> operations; the idea is that this allows removing the code from >> >> LegalizeDAG that handles illegal types, which should be a significant
2009 May 21
2
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
...andedNodes map is filled in for any results that are expanded, and - /// the Lo/Hi values are returned. This applies to integer types and Vector - /// types. - void ExpandOp(SDValue O, SDValue &Lo, SDValue &Hi); - - /// WidenVectorOp - Widen a vector operation to a wider type given by WidenVT - /// (e.g., v3i32 to v4i32). The produced value will have the correct value - /// for the existing elements but no guarantee is made about the new elements - /// at the end of the vector: it may be zero, ones, or garbage. This is useful - /// when we have an instruction operating on an illega...
2013 Aug 12
2
[LLVMdev] vector type legalization
...4i32. The operation nay be scalarized in the vector >legalization phase. What I'm looking at is a v3i8 add. In DAGTypeLegalizer::WidenVecRes_Binary the operation gets scalarized (DAG.UnrollVector). The input N is "0x51c1d60: v3i8 = add 0x51c1860, 0x51c1c60 [ORD=5] [ID=0]" and the WidenVT is v4i8. The code ends up in the NumElts == 1 path which causes scalarization. The debug dump shows "Widen node result 0: 0x563dd20: v3i8 = add 0x563d820, 0x563dc20 [ORD=5] [ID=0]". To me it doesn't look like it's possible to both widen and promote an operation.. Paul > >...
2013 Aug 12
0
[LLVMdev] vector type legalization
...alarized in the vector >> legalization phase. > > What I'm looking at is a v3i8 add. In DAGTypeLegalizer::WidenVecRes_Binary > the operation gets scalarized (DAG.UnrollVector). The input N is > "0x51c1d60: v3i8 = add 0x51c1860, 0x51c1c60 [ORD=5] [ID=0]" and the > WidenVT is v4i8. The code ends up in the NumElts == 1 path which causes > scalarization. > > The debug dump shows "Widen node result 0: 0x563dd20: v3i8 = add > 0x563d820, 0x563dc20 [ORD=5] [ID=0]". To me it doesn't look like it's > possible to both widen and promote an ope...
2013 Aug 12
0
[LLVMdev] vector type legalization
Hi Paul, You can read about it here: http://blog.llvm.org/2011/12/llvm-31-vector-changes.html > Hi, > > I am trying to understand how vector type legalization works. In particular, I'm looking at i8 vector types on x86 (with sse42 features) > > v3i8 gets widened to v4i8 and then operations get unrolled (scalarized) because v4i8 is not a legal type whereas v4i8 gets This
2013 Aug 12
2
[LLVMdev] vector type legalization
Hi, I am trying to understand how vector type legalization works. In particular, I'm looking at i8 vector types on x86 (with sse42 features) v3i8 gets widened to v4i8 and then operations get unrolled (scalarized) because v4i8 is not a legal type whereas v4i8 gets promoted to v4i32. Why doesn't v3i8 (or even v4i8) get widened to v16i8? Alternatively, v3i8 could be widened to v4i8 then
2013 Aug 12
2
[LLVMdev] vector type legalization
...t; v4i32. The operation nay be scalarized in the vector legalization phase. What I'm looking at is a v3i8 add. In DAGTypeLegalizer::WidenVecRes_Binary the operation gets scalarized (DAG.UnrollVector). The input N is "0x51c1d60: v3i8 = add 0x51c1860, 0x51c1c60 [ORD=5] [ID=0]" and the WidenVT is v4i8. The code ends up in the NumElts == 1 path which causes scalarization. The debug dump shows "Widen node result 0: 0x563dd20: v3i8 = add 0x563d820, 0x563dc20 [ORD=5] [ID=0]". To me it doesn't look like it's possible to both widen and promote an operation.. Paul promoted...
2013 Aug 13
1
[LLVMdev] vector type legalization
...t; v4i32. The operation nay be scalarized in the vector legalization phase. What I'm looking at is a v3i8 add. In DAGTypeLegalizer::WidenVecRes_Binary the operation gets scalarized (DAG.UnrollVector). The input N is "0x51c1d60: v3i8 = add 0x51c1860, 0x51c1c60 [ORD=5] [ID=0]" and the WidenVT is v4i8. The code ends up in the NumElts == 1 path which causes scalarization. The debug dump shows "Widen node result 0: 0x563dd20: v3i8 = add 0x563d820, 0x563dc20 [ORD=5] [ID=0]". To me it doesn't look like it's possible to both widen and promote an operation.. Paul promoted...