Displaying 6 results from an estimated 6 matches for "white_papers_and_tech_doc".
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white_papers_and_tech_docs
2005 May 27
0
SVM/Pacifica Spec posted
Ths SVM/Pacifica spec is now posted. It can be found on the AMD64
Architecture page:
http://www.amd.com/us-en/Processors/TechnicalResources/0,,30_182_739_704
4,00.html
The PDF file link is at:
http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/
33047.pdf
Elsie Wahlig
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2004 Aug 06
2
[PATCH] Make SSE Run Time option. Add Win32 SSE code
...port XMM registers. In the morning we will check the
code on Windows XP. This may be a Windows specific thing, either way you
still need to support non FP versions of the SSE set.
If you read through AMD's processor detection guide
(PDF)
http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/20734.pdf
and go to section that shows the sample code for dealing with CPUID
support. (Starts about Page 37) It talks about the FEATURE_SSEFP support
which you have to query for. On the Atholon XP 2400+ that we have here,
that code does not detect the presence of that when run under Windows....
2004 Aug 06
0
[PATCH] Make SSE Run Time option. Add Win32 SSE code
...support non FP versions of the SSE set.
Most likely, you have on OS problem. I have yet to find code that runs
on a Pentium III and doesn't run on an Athlon XP.
> If you read through AMD's processor detection guide
> (PDF)
> http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/20734.pdf
>
> and go to section that shows the sample code for dealing with CPUID
> support. (Starts about Page 37) It talks about the FEATURE_SSEFP support
> which you have to query for. On the Atholon XP 2400+ that we have here,
> that code does not detect the presence of that...
2002 Jun 27
4
Minimum cpu requirements
Hello folks
Anyone know if this would be enough to decode oggs?
AMD Elan SC520 133 MHz
If not, what seems to be the lower limit required for decoding oggs?
Many thanks,
Kerry.
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containing only
2004 Aug 06
2
[PATCH] Make SSE Run Time option. Add Win32 SSE code
Jean-Marc,
There is a big difference between SSE and SSEFP. The SSEFP means
that the CPU supports the xmm registers. All Intel chips with SSE support
do, however no current 32 bit AMD chips support the XMM registers. They
will support the SSE instructions but not those registers. You are right
about the SSE2 not being used.
The AMD Opterons are the first AMD CPU's which support
2008 Jul 10
49
Supermicro AOC-USAS-L8i
On Wed, Jul 9, 2008 at 1:12 PM, Tim <tim at tcsac.net> wrote:
> Perfect. Which means good ol'' supermicro would come through :) WOHOO!
>
> AOC-USAS-L8i
>
> http://www.supermicro.com/products/accessories/addon/AOC-USAS-L8i.cfm
Is this card new? I''m not finding it at the usual places like Newegg, etc.
It looks like the LSI SAS3081E-R, but probably at 1/2 the