search for: whdr

Displaying 18 results from an estimated 18 matches for "whdr".

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2008 Feb 15
0
speex echo problem in my own softphone to POTS
...all the voice returned back in TraditionalPhone. It seems SpeexEcho stops to work. What I have done In my softPhone project with SpeexEcho are these: 1. prepare a buffer with 4000 bytes deep. 2. "state = speex_echo_state_init( 160, 1280 )" then: 3. put waveData(wHdr) into buffer after "waveOutWrite(hWaveOut, wHdr, sizeof(*wHdr))" 4. in "WaveInCallback" function: Get waveData From buffer, and use "spxec_echo_cancel(state, waveInData, DataGotFromBuffer, tmpBuffer,0)" 5. then push tmpBuffer to Encode Module, package to G.729...
2015 Feb 05
4
[PATCH] load_linux: correct a type
...lib/syslinux/load_linux.c b/com32/lib/syslinux/load_linux.c index 06ae2a9..ac73729 100644 --- a/com32/lib/syslinux/load_linux.c +++ b/com32/lib/syslinux/load_linux.c @@ -155,8 +155,8 @@ int bios_boot_linux(void *kernel_buf, size_t kernel_size, char *cmdline) { struct linux_header hdr, *whdr; - size_t real_mode_size, prot_mode_size, base; - addr_t real_mode_base, prot_mode_base, prot_mode_max; + size_t real_mode_size, prot_mode_size; + addr_t real_mode_base, prot_mode_base, prot_mode_max, base; addr_t irf_size; size_t cmdline_size, cmdline_offset; struct setu...
2016 Nov 02
0
[PATCH v3 14/15] secboot: abstract LS firmware loading functions
...c load_func) * Return: offset at the end of this image. */ static u32 -ls_ucode_img_fill_headers(struct acr_r352 *acr, struct ls_ucode_img *img, - u32 offset) +acr_r352_ls_img_fill_headers(struct acr_r352 *acr, + struct ls_ucode_img_r352 *img, u32 offset) { - struct lsf_wpr_header *whdr = &img->wpr_header; - struct lsf_lsb_header *lhdr = &img->lsb_header; - struct ls_ucode_img_desc *desc = &img->ucode_desc; + struct ls_ucode_img *_img = &img->base; + struct acr_r352_lsf_wpr_header *whdr = &img->wpr_header; + struct acr_r352_lsf_lsb_header *lhdr =...
2015 Feb 08
0
[PATCH] load_linux: relocate protected-mode code as intended
...he initially determined location, that code will be moved to the next available location. However, beginning with commit 8f470e7b, the code is moved to the initially determined location instead of the next available location because prot_mode_base is no longer updated to the correct location. Since whdr->code32_start is updated, it is pointing to the wrong execution start location, random code is executed and the machine is rebooted. Restore the old behavior by assigning prot_mode_base the value of base. Tested on a machine that exposed this behavior. Signed-off-by: Scot Doyle <lkml14 at s...
2016 Nov 02
0
[PATCH v3 12/15] secboot: remove unneeded ls_ucode_img member
...ls_ucode_img *img, const struct acr_r352_ls_func *func = acr->func->ls_func[img->falcon_id]; - if (img->ucode_header) { - nvkm_fatal(acr->base.subdev, - "images withough loader are not supported yet!\n"); - return offset; - } - /* Fill WPR header */ whdr->falcon_id = img->falcon_id; whdr->bootstrap_owner = acr->base.func->boot_falcon; @@ -309,7 +303,6 @@ ls_ucode_mgr_cleanup(struct ls_ucode_mgr *mgr) list_for_each_entry_safe(img, t, &mgr->img_list, node) { kfree(img->ucode_data); - kfree(img->ucode_header);...
2017 Mar 05
0
[PATCH] Fix recognition of keeppxe option
...ent(cmdline, "keeppxe")) { > + extern __weak char KeepPXE; > + > + KeepPXE = 1; /* for pxelinux_scan_memory */ > + bootflags = 3; /* for unload_pxe */ > + } > + > /* Copy the header into private storage */ > /* Use whdr to modify the actual kernel header */ > memcpy(&hdr, kernel_buf, sizeof hdr); > @@ -495,7 +507,7 @@ int bios_boot_linux(void *kernel_buf, si > dprintf("*** vga=current, not calling syslinux_force_text_mode()...\n"); > } > > - syslinux_shuffle_boo...
2016 Jun 10
4
[PATCH] Fix recognition of keeppxe option
...syslinux_filesystem() == SYSLINUX_FS_PXELINUX && + find_argument(cmdline, "keeppxe")) { + extern __weak char KeepPXE; + + KeepPXE = 1; /* for pxelinux_scan_memory */ + bootflags = 3; /* for unload_pxe */ + } + /* Copy the header into private storage */ /* Use whdr to modify the actual kernel header */ memcpy(&hdr, kernel_buf, sizeof hdr); @@ -495,7 +507,7 @@ int bios_boot_linux(void *kernel_buf, si dprintf("*** vga=current, not calling syslinux_force_text_mode()...\n"); } - syslinux_shuffle_boot_rm(fraglist, mmap, 0, &regs)...
2016 Dec 14
18
[PATCH v5 0/18] Secure Boot refactoring
Sending things in a smaller chunks since it makes their reviewing easier. This part part 2/3 of the secboot refactoring/PMU command support patch series. Part 1 was the new falcon library which should be merged soon now. This series is mainly a refactoring/sanitization of the existing secure boot code. It does not add new features (part 3 will). Secure boot handling is now separated by NVIDIA
2013 Dec 04
0
Boot iPXE from syslinux/isolinux
...Unable to find lowmem for cmdline\n"); + return (0x9ff0 - cmdline_size) & ~15; /* Legacy value: pure hope... */ } int bios_boot_linux(void *kernel_buf, size_t kernel_size, @@ -159,7 +156,7 @@ int bios_boot_linux(void *kernel_buf, size_t kernel_size, { struct linux_header hdr, *whdr; size_t real_mode_size, prot_mode_size, base; - addr_t real_mode_base, prot_mode_base; + addr_t real_mode_base, prot_mode_base, prot_mode_max; addr_t irf_size; size_t cmdline_size, cmdline_offset; struct setup_data *sdp; @@ -243,9 +240,19 @@ int bios_boot_linux(void *kerne...
2016 Oct 27
15
[PATCH v2 00/14] Secure Boot refactoring
This is a rework of the secure boot code that moves the building of the blob into its own set of source files (and own hooks), making the code more flexible and (hopefully) easier to understand as well. This rework is needed to support more signed firmware for existing and new chips. Since the firmwares in question are not available yet I cannot send the code to manage then, but hopefully the
2016 Nov 02
15
[PATCH v3 00/15] Secure Boot refactoring
This is a rework of the secure boot code that moves the building of the blob into its own set of source files (and own hooks), making the code more flexible and (hopefully) easier to understand as well. This rework is needed to support more signed firmware for existing and new chips. Since the firmwares in question are not available yet I cannot send the code to manage then, but hopefully the
2016 Feb 24
0
[PATCH v3 10/11] secboot/gm200: add secure-boot support
...tarts + * + * Allocate space in the WPR area from offset and write the WPR and LSB headers + * accordingly. + * + * Return: offset at the end of this image. + */ +static u32 +ls_ucode_img_fill_headers(struct gm200_secboot *gsb, struct ls_ucode_img *img, + u32 offset) +{ + struct lsf_wpr_header *whdr = &img->wpr_header; + struct lsf_lsb_header *lhdr = &img->lsb_header; + struct ls_ucode_img_desc *desc = &img->ucode_desc; + + if (img->ucode_header) { + nvkm_fatal(&gsb->base.subdev, + "images withough loader are not supported yet!\n"); + return off...
2016 Nov 21
33
[PATCH v4 0/33] Secure Boot refactoring / signed PMU firmware support for GM20B
This revision includes initial signed PMU firmware support for GM20B (Tegra X1). This PMU code will also be used as a basis for dGPU signed PMU firmware support. With the PMU code, the refactoring of secure boot should also make more sense. ACR (secure boot) support is now separated by the driver version it originates from. This separation allows to run any version of the ACR on any chip,
2013 Dec 04
2
Boot iPXE from syslinux/isolinux
"H. Peter Anvin" <hpa at zytor.com> on Tue, 2013/12/03 20:26: > On 10/24/2013 01:09 AM, Christian Hesse wrote: > >>> > >>> version 6.02-pre5 works, 6.02-pre6 does not. > >> > >> Struggled with git bisect, but finally succeeded: > >> > >> 8f470e7bfe75f6401f6c5432988c620b863ad274 is the first bad commit > >>
2016 Jan 18
6
[PATCH v2 0/5] nouveau: add secure boot support for dGPU and Tegra
This is a highly changed revision of the first patch series that adds secure boot support to Nouveau. This code still depends on NVIDIA releasing official firmware files, but the files released with SHIELD TV and Pixel C can already be used on a Jetson TX1. As you know we are working hard to release the official firmware files, however in the meantime it doesn't hurt to review the code so it
2016 Oct 11
10
[PATCH 0/8] Secure Boot refactoring
Hi everyone, Apologies for the big patchset. This is a rework of the secure boot code that moves the building of the blob into its own set of source files (and own hooks), making the code more flexible and (hopefully) easier to understand as well. This rework is needed to support more signed firmware for existing and new chips. Since the firmwares in question are not available yet I cannot send
2016 Feb 24
11
[PATCH v3 00/11] nouveau: add secure boot support for dGPU and Tegra
New version of the secure boot code that works with the blobs just merged into linux-firmware. Since the required Mesa patches are also merged, this set is the last piece of the puzzle to get out-of-the-box accelerated Maxwell 2. The basic code remains the same, with a few improvements with respect to how secure falcons are started. Hopefully the patchset is better split too. I have a
2016 Nov 02
0
[PATCH v3 06/15] secboot: add low-secure firmware hooks
...gm200_flcn_bl_desc *desc = _desc; + const struct ls_ucode_img_desc *pdesc = &img->ucode_desc; u64 addr_base; addr_base = wpr_addr + img->lsb_header.ucode_off + @@ -620,6 +446,8 @@ ls_ucode_img_fill_headers(struct gm200_secboot *gsb, struct ls_ucode_img *img, struct lsf_wpr_header *whdr = &img->wpr_header; struct lsf_lsb_header *lhdr = &img->lsb_header; struct ls_ucode_img_desc *desc = &img->ucode_desc; + const struct secboot_ls_single_func *func = + (*gsb->ls_func)[img->falcon_id]; if (img->ucode_header) { nvkm_fatal(&gsb->base...