Displaying 4 results from an estimated 4 matches for "wdregs".
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2010 Aug 29
2
[LLVMdev] Register design decision for backend
...: Register<"r0">, DwarfRegNum<[0]>;
def R1 : Register<"r1">, DwarfRegNum<[1]>;
// reg pairs
def R1R0 : RegisterWithSubRegs<"r0", [R0, R1]>, DwarfRegNum<[0]>;
def GPR8 : RegisterClass<"TEST", [i8], 8, [R0, R1]>;
def WDREGS : RegisterClass<"TEST", [i16], 16, [R1R0]>
{
let SubRegClassList = [GPR8, GPR8];
}
This way i could work with register pairs easily, for example storing i16
data inside the WDREGS class or i32 inside 2 WDREGS registers, etc. I
thought everything was going fine until i tried to...
2010 Aug 31
0
[LLVMdev] Register design decision for backend
...DwarfRegNum<[0]>;
> def R1 : Register<"r1">, DwarfRegNum<[1]>;
>
> // reg pairs
> def R1R0 : RegisterWithSubRegs<"r0", [R0, R1]>, DwarfRegNum<[0]>;
>
> def GPR8 : RegisterClass<"TEST", [i8], 8, [R0, R1]>;
> def WDREGS : RegisterClass<"TEST", [i16], 16, [R1R0]>
> {
> let SubRegClassList = [GPR8, GPR8];
> }
>
> This way i could work with register pairs easily, for example storing i16
> data inside the WDREGS class or i32 inside 2 WDREGS registers, etc. I
> thought everythin...
2010 Nov 27
3
[LLVMdev] Register Pairing
...#39;re returning the result. This gives me this code
before instr sel:
# Machine code for function foo:
Function Live Ins: %R25R24 in reg%16384, %R23R22 in reg%16385
Function Live Outs: %R25R24
BB#0: derived from LLVM BB %entry
Live Ins: %R25R24 %R23R22
%reg16385<def> = COPY %R23R22; WDREGS:%reg16385 // COPY B
%reg16384<def> = COPY %R25R24; WDREGS:%reg16384 // COPY A
%reg16387<def> = COPY %reg16384:ssub_0; GPR8:%reg16387 WDREGS:%reg16384
// EXTRACT LO BYTE OF A
%reg16388<def> = COPY %reg16385:ssub_0; GPR8:%reg16388 WDREGS:%reg16385
// EXTRACT LO BYTE OF...
2010 Aug 31
2
[LLVMdev] Register design decision for backend
...my question :)
I got a bit confused with the fact you said that the subregister class is
larger than the superregister class. As far as i understood or what i tried
to do with my code is to define a register pair composed of two 8 bit
registers the way i described in my previous message. So R1R0 in WDREGS is
directly mapped into R0 and R1 of GPR8. Meaning that 2 GPR8 = 1 WDREG. Also,
R1R0 is the superreg of R1 and R0?
Incase i wasnt clear enough i'll expose a simple example using the common
known x86 arch.
AX is composed by AL and AH (AX and AH are subregs of AX), now assume x86
can only add re...