search for: wart

Hey, all. I'm seriously thinking about doing the VoIP thing at home. The perfect platform seemed to be the Sheeva "wall wart" (http://www.marvell.com/products/embedded_processors/developer/kirkwood/sheevaplug.jsp). It's a cute little doohicky with USB, SD-card, Ethernet, and runs on an ARM CPU. I'd like to avoid SIP to my provider, just 'cause it's always such a drag going through NAT and so forth....

Sprinkling my examples with ''lambda'' has always seemed like a bit of a wart to me. I''ve gotten into the habit of adding ''alias :calling :lambda'' to my spec suites. My examples then look like: calling { Foo }.should raise_error calling { Bar }.should_not raise_error Is there a reason that RSpec core has chosen not to make exception expectations...

Hi Everyone ; I will soon be making a presentation comparing ZFS against Veritas Storage Foundation , do we have any document comparing features ? regards <http://www.sun.com/> http://www.sun.com/emrkt/sigs/6g_top.gif Mertol Ozyoney Storage Practice - Sales Manager Sun Microsystems, TR Istanbul TR Phone +902123352200 Mobile +905339310752 Fax +902123352222 Email

Hello people, I am having difficulties figuring out the POE power draw in watts from a Polycom IP601. I want to know how many IP601's can be powered from the Cisco Catalyst 3560G-48PS. The IP601 wallwart has: Input 120VAC 60hz 19W, Output 24VDC 500mA. I assume the output is appropriate value to figure out how many phones can be powered. The Cisco 3560 datasheet says "the 48-port PoE configurations can deliver the necessary power to support 24 ports at 15.4W, 48 ports at 7.7W, or any combinat...

...8 at 01:28:03PM +0300, Michael S. Tsirkin wrote: > Let me reply to the "crappy" part first: > So virtio devices can run on another CPU or on a PCI bus. Configuration > can happen over mupltiple transports. There is a discovery protocol to > figure out where it is. It has some warts but any real system has warts. > > So IMHO virtio running on another CPU isn't "legacy virtual crappy > virtio". virtio devices that actually sit on a PCI bus aren't "sane" > simply because the DMA is more convoluted on some architectures. All of what you...

...8 at 01:28:03PM +0300, Michael S. Tsirkin wrote: > Let me reply to the "crappy" part first: > So virtio devices can run on another CPU or on a PCI bus. Configuration > can happen over mupltiple transports. There is a discovery protocol to > figure out where it is. It has some warts but any real system has warts. > > So IMHO virtio running on another CPU isn't "legacy virtual crappy > virtio". virtio devices that actually sit on a PCI bus aren't "sane" > simply because the DMA is more convoluted on some architectures. All of what you...

Dear List, I have had problems inserting some (not all !) figures via odfWeave (using print(someLatticeFunction)...). The figure was correctly displayed in a R device window but the resulting ODF document displayed the correct space for the figure and an empty frame with a "broken image" icon and a "read error" mention. Exploration of the odf (.odt, in my case) file showed

On Fri, Jul 27, 2018 at 10:58:05AM +0100, Will Deacon wrote: > > I just wanted to say that this patch series provides a means for us to > force the coherent DMA ops for legacy virtio devices on arm64, which in turn > means that we can enable the SMMU with legacy devices in our fastmodel > emulation platform (which is slowly being upgraded to virtio 1.0) without > hanging during

On Fri, Jul 27, 2018 at 10:58:05AM +0100, Will Deacon wrote: > > I just wanted to say that this patch series provides a means for us to > force the coherent DMA ops for legacy virtio devices on arm64, which in turn > means that we can enable the SMMU with legacy devices in our fastmodel > emulation platform (which is slowly being upgraded to virtio 1.0) without > hanging during

...said, my simple dynamically linked hello world executed fine (ie, it was able to call into libc.so just fine), as well as an old C version of the SPEC97 tomcatv benchmark I have laying around. So it seems both 32-bit and 64-bit can call into shared libs. Not to say I haven't seen some code gen warts (using -O3). :) >From hello.s: main: mflr 0 stw 31, -4(1) stw 0, 4(1) stwu 1, -16(1) lis 3, .Lstr at ha mr 31, 1 la 3, .Lstr at l(3) bl puts li 3, 0 addi 1, 1, 16 lwz 0, 4(1) lwz 31, -4(1)...

...uary 2015 at 11:46, Martin Maechler wrote: | (I've seen .. but not investigated other cases where Travis | would barf about things that were fine for me). I often file that under "Travis has a screw loose for sticking with Ubuntu 12.04". It's a fantastic service, but it has its warts. "Word" is that at some point they'll switch to a new release "at some point". For R, we are getting by via eg R builds off the CRAN / PPA repos administered by Michael, but for some other libraries it shows its age. One can code around it if one knows how to prepare a mat...

Yup, I've got one remaining bug that holding up the CellSPU release. It still has a bunch of warts, but so long as I can get it into shape such that llvm-gcc-4.2 compiles all the way through, then we collectively have something with which to work. I'm getting the following error from llc, the attachments have llc's debug and the .ll files, respectively. Can anyone shed some light...

...umina in TrueOS) or have badly lagging ports compared to the upstream version. I suspect it?s probably easier to start with C6, then backport as much as is possible without dragging in any systemd stuff, the same way the BSDs are doing. Good luck to y?all. Sincerely. I plan to keep on using C7, warts and all.

Hello, I am trying to solve a problem that I can foresee when I deploy Asterisk into a few SOHO situations soon. In Nebraska and in my area of Western Pennsylvania we have violent thunderstorms in spring and summer and sometimes very heavy wet snow in Winter. Both type of event will take out the power of a period of 30sec to 36-hours. So no UPS system would be able to handle a system for over

...regardless of whether I build from sources pulled from the repository (even when pulling from "tags/RELEASE_32/final") or from the release tarballs. Is this correct behavior? Even if this odd naming is what is expected, why is this artifact in the name of a shared library?  Is this "wart" in the internal name, too?  Are there any recommendations that suggest renaming this library or linking against this library in a way that doesn't maintain or require this wierdness? I apologize if I seem overly critical - I just don't understand the rationale for it, and it seems th...

...an only get a ConstantAggregateZero.  This is actually kind of > annoying, and means that places expecting a ConstantArray have to remember to > also check for ConstantAggregateZero.  Perhaps there's a good reason for the > current design, but if not it would be great to eliminate this wart. Well, I think the main reason it so reduce the size of .ll / .bc when all operands are zero. If the array / struct is really big then this can save a lot of space. -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University

...I guess we'll have to keep it, but we really need to avoid adding more junk than this. > However the question people raise is that DMA API is already full of > arch-specific tricks the likes of which are outlined in your post linked > above. How is this one much worse? None of these warts is visible to the driver, they are all handled in the architecture (possibly on a per-bus basis). So for virtio we really need to decide if it has one set of behavior as specified in the virtio spec, or if it behaves exactly as if it was on a PCI bus, or in fact probably both as you lined up. Bu...

...I guess we'll have to keep it, but we really need to avoid adding more junk than this. > However the question people raise is that DMA API is already full of > arch-specific tricks the likes of which are outlined in your post linked > above. How is this one much worse? None of these warts is visible to the driver, they are all handled in the architecture (possibly on a per-bus basis). So for virtio we really need to decide if it has one set of behavior as specified in the virtio spec, or if it behaves exactly as if it was on a PCI bus, or in fact probably both as you lined up. Bu...

...t out the schedule. Also please let me know which node it is processing at the time of the assertion. Evan On Oct 15, 2007, at 11:48 PM, Scott Michel <scottm at aero.org> wrote: > Yup, I've got one remaining bug that holding up the CellSPU release. > It still has a bunch of warts, but so long as I can get it into > shape such that llvm-gcc-4.2 compiles all the way through, then we > collectively have something with which to work. > > I'm getting the following error from llc, the attachments have llc's > debug and the .ll files, respectively. Ca...

Hi all, I'm looking for recommendations on ethernet switches for a new install. Ideally would want switches with at least 24 ports, ideally with a GE uplink, and that support PoE (power over ethernet) on every port. I've seen lots of switches, and lots of "power hubs", but the combination, which makes a lot of sense, seems rare. What is out there? Do the switches need to be