Displaying 4 results from an estimated 4 matches for "wait_for_pmu_reply".
2015 Nov 14
1
[PATCH v2] pmu: fix queued messages while getting no IRQ
...b/drm/nouveau/nvkm/subdev/pmu/base.c
index 6b2007f..fafbe2a 100644
--- a/drm/nouveau/nvkm/subdev/pmu/base.c
+++ b/drm/nouveau/nvkm/subdev/pmu/base.c
@@ -43,6 +43,41 @@ nvkm_pmu_handle_reclk_request(struct work_struct *work)
nvkm_clk_pmu_reclk_request(clk, pmu->intr.data[0]);
}
+static int
+wait_for_pmu_reply(struct nvkm_pmu *pmu, u32 reply[2])
+{
+ struct nvkm_subdev *subdev = &pmu->subdev;
+ struct nvkm_device *device = subdev->device;
+ unsigned long jiffies = msecs_to_jiffies(1000);
+
+ if (!wait_event_timeout(pmu->recv.wait, (pmu->recv.process == 0), jiffies)) {
+ u32 addr = nvkm_r...
2015 Nov 14
0
[PATCH v3] pmu: fix queued messages while getting no IRQ
...b/drm/nouveau/nvkm/subdev/pmu/base.c
index 6b2007f..81a5583 100644
--- a/drm/nouveau/nvkm/subdev/pmu/base.c
+++ b/drm/nouveau/nvkm/subdev/pmu/base.c
@@ -43,6 +43,34 @@ nvkm_pmu_handle_reclk_request(struct work_struct *work)
nvkm_clk_pmu_reclk_request(clk, pmu->intr.data[0]);
}
+static int
+wait_for_pmu_reply(struct nvkm_pmu *pmu, u32 reply[2])
+{
+ struct nvkm_subdev *subdev = &pmu->subdev;
+ struct nvkm_device *device = subdev->device;
+ unsigned long jiffies = msecs_to_jiffies(1000);
+
+ if (!wait_event_timeout(pmu->recv.wait, (pmu->recv.process == 0), jiffies)) {
+ u32 addr = nvkm_r...
2016 Mar 01
2
[PATCH 0/2] PMU communications improvements
Both patches should make the communicating with the PMU more stable.
Karol Herbst (2):
pmu: fix queued messages while getting no IRQ
pmu: be more strict about locking
drm/nouveau/nvkm/subdev/pmu/base.c | 49 ++++++++++++++++++++++++++++++++------
1 file changed, 42 insertions(+), 7 deletions(-)
--
2.7.2
2017 May 07
6
[RFC v2 0/6] PMU engine counters
reworked this series quite a lot.
Now we want the Host to configure the counters through the PMU.
The series isn't complete though because it needs:
1. reordering
2. better commit messages
but I felt like sending those out before doing a final version.
I also found some weird register overwriting issue on the PMU I have to track
down, because it interfers with the counter read out. I am