search for: w5

Displaying 20 results from an estimated 53 matches for "w5".

2013 Apr 04
5
Help for bootstrapping‏
...##set.seed(4114)bs=1000 ###number of bootstrap samplesRegion<-5 ###Region indecies, check above.lamdaseq<-seq(0,1,.05) ###the lamda sequence. currently from 0 to 1 by .05. x<-numeric(bs*length(lamdaseq)) ###w1<-matrix(x, bs, length(lamdaseq)) ###To initialise the matrices.w5<-matrix(x, bs, length(lamdaseq)) ###1, 5, 10 denote the horizon.w10<-matrix(x, bs, length(lamdaseq)) ### for (i in 1: bs){BSData<-GetBSData(OriData)+1j=1 for (lamda in lamdaseq){ w1[i,j]<-Opt(BSData, 1, Region, lamda)[1] w5[i,j]<-Opt(BSData, 5, Region, lamda)[1] w10[i,j]<-Opt(...
2011 Mar 21
2
exclude the latest php
...| 951 B 00:00 Reducing CentOS-5 Testing to included packages only Finished Excluding Packages from Webtatic Repository 5 - i386 Finished Setting up Install Process Resolving Dependencies --> Running transaction check ---> Package php.i386 0:5.3.6-1.w5 set to be updated --> Processing Dependency: httpd-mmn = 20051115 for package: php --> Processing Dependency: php-common = 5.3.6-1.w5 for package: php --> Processing Dependency: php-cli = 5.3.6-1.w5 for package: php --> Processing Dependency: httpd for package: php --> Running transa...
2011 Mar 15
4
install specific version using yum
Hello list! I have been instructed to install very specific version numbers of httpd and php on the company web servers. Here's what I've tried so far [root at ec2-50-17-114-126 ~]# yum install php-5.2.17-1.w5.i386 Loaded plugins: fastestmirror Loading mirror speeds from cached hostfile * addons: yum.singlehop.com * base: mirror.rackspace.com * epel: nas1.itc.virginia.edu * extras: centos.supsec.org * updates: pubmirrors.reflected.net Setting up Install Process No package php-5.2.17-1.w5.i386 availa...
2014 Sep 02
3
[LLVMdev] LICM promoting memory to scalar
...-march=armv8-a+simd test.cpp .arch armv8-a+fp+simd .file "test.cpp" .text .align 2 .global _Z3fooii .type _Z3fooii, %function _Z3fooii: .LFB0: .cfi_startproc cbz w0, .L1 adrp x6, globalvar add w5, w0, w0, lsr 31 ldr w3, [x6,#:lo12:globalvar] <== hoist load of globalvar mov w2, 0 asr w5, w5, 1 .L4: cmp w5, w2 add w2, w2, w1 add w4, w3, w1 csel w3, w4, w3, hi cmp w2, w0 bcc .L4...
2013 Mar 12
2
big edge list to adjacency matrix
I have huge list of edges with weights. a1 b1 w1 a2 b2 w2 a3 b3 w3 a1 b1 w4 a3 b1 w5 I have to convert it into 2 dim matrix b1 b2 b3 a1 max(w1,w4) 0 0 a2 0 w2 0 a3 w5 0 w3 if edges repeated take the maximum weights. How do this efficiently without using for loop? Any idea. thanks Avi [...
2009 Apr 04
2
data.frame, converting row data to columns
...excited 9 4101 0.24 4 excited 10 4101 0.23 4 excited I am trying to change it to this: name nLevel emot w1 w2 w3 w4 w5 w5 4094 1 frustrated 3.34 3.94 NA 3.51 3.81 2.65 4101 4 excited 2.62 NA 0.24 0.23 NA NA The nLevel and emot will never vary with the name, so there can be one...
2014 Sep 02
2
[LLVMdev] LICM promoting memory to scalar
..." >> .text >> .align 2 >> .global _Z3fooii >> .type _Z3fooii, %function >> _Z3fooii: >> .LFB0: >> .cfi_startproc >> cbz w0, .L1 >> adrp x6, globalvar >> add w5, w0, w0, lsr 31 >> ldr w3, [x6,#:lo12:globalvar] <== hoist load of globalvar >> mov w2, 0 >> asr w5, w5, 1 >> .L4: >> cmp w5, w2 >> add w2, w2, w1 >> add w4, w...
2014 Sep 03
3
[LLVMdev] LICM promoting memory to scalar
...-march=armv8-a+simd test.cpp         .arch armv8-a+fp+simd         .file   "test.cpp"         .text         .align  2         .global _Z3fooii         .type   _Z3fooii, %function _Z3fooii: .LFB0:         .cfi_startproc         cbz     w0, .L1         adrp    x6, globalvar         add     w5, w0, w0, lsr 31         ldr     w3, [x6,#:lo12:globalvar]                        <== hoist load of globalvar         mov     w2, 0         asr     w5, w5, 1 .L4:         cmp     w5, w2         add     w2, w2, w1         add     w4, w3, w1         csel    w3, w4, w3, hi         cmp     w2, w0    ...
2018 Dec 05
2
Strange regalloc behaviour: one more available register causes much worse allocation
...to be a useful way of provoking the problem. Without the patch generating assembly with llc -mcpu=cortex-a57 everything looks fine, but with the patch we get this (which comes from the block bb.17.switchdest13): .LBB0_16: mov x29, x24 mov w24, w20 mov w20, w19 mov w19, w7 mov w7, w6 mov w6, w5 mov w5, w2 mov x2, x18 mov w18, w15 orr w15, wzr, #0x1c str w15, [x8, #8] mov w0, wzr mov w15, w18 mov x18, x2 mov w2, w5 mov w5, w6 mov w6, w7 mov w7, w19 mov w19, w20 mov w20, w24 mov x24, x29 b .LBB0_3 It looks like the orr and str have barged in and said "we're using w...
2018 Dec 05
3
Strange regalloc behaviour: one more available register causes much worse allocation
...nerating assembly with llc -mcpu=cortex-a57 everything looks fine, but with the patch we get this (which comes from the block bb.17.switchdest13): .LBB0_16: mov x29, x24 mov w24, w20 mov w20, w19 mov w19, w7 mov w7, w6 mov w6, w5 mov w5, w2 mov x2, x18 mov w18, w15 orr w15, wzr, #0x1c str w15, [x8, #8] mov w0, wzr mov w15, w18 mov x18, x2 mov w2, w5 mov w5, w6 mov w6, w7 mov w7, w19...
2006 Nov 15
2
??: Re:??: Re: Need help in waveslim package: imodwt and universal.thresh.modwt
...don't think you have to find an English computer 'cause the following must work in your Chinese one :-) Let me explain. First of all, change your lines to xdata <- ckhdat$Adj..Close[1:1447] #names(ckhdwt.la8) <- c("w1", "w2", "w3", "w4", "w5","w6", "v6") note the # sign, i.e., DO NOT change the names before the function imodwt. This is because the function imodwt looks for the names created by the modwt function. If you need to change names, do it AFTER the reconstruction. I hope that it helps you. Rogerio...
2017 Sep 19
0
[iovisor-dev] [PATCH RFC 3/4] New 32-bit register set
...>; > +def W1 : Wi<1, "w1">, DwarfRegNum<[1]>; > +def W2 : Wi<2, "w2">, DwarfRegNum<[2]>; > +def W3 : Wi<3, "w3">, DwarfRegNum<[3]>; > +def W4 : Wi<4, "w4">, DwarfRegNum<[4]>; > +def W5 : Wi<5, "w5">, DwarfRegNum<[5]>; > +def W6 : Wi<6, "w6">, DwarfRegNum<[6]>; > +def W7 : Wi<7, "w7">, DwarfRegNum<[7]>; > +def W8 : Wi<8, "w8">, DwarfRegNum<[8]>; > +def W9 : Wi<9, &q...
2015 Feb 19
2
[LLVMdev] ScheduleDAGInstrs computes deps using IR Values that may be invalid
...%W7<def> = LDRBBui %X7<kill>, 1; mem:LD1[%scevgep99](tbaa=<0x6e02518>) %W0<def> = LDRSBWui %X0<kill>, 1; mem:LD1[%scevgep101](tbaa=<0x6e02518>) %W6<def> = LDRBBui %X6<kill>, 1; mem:LD1[%scevgep103](tbaa=<0x6e02518>) %W5<def> = MADDWrrr %W6<kill>, %W0<kill>, %W7<kill> %X9<def> = ADDXri %X9<kill>, 2, 0 %X13<def> = ADDXri %X13<kill>, 2, 0 %WZR<def,dead> = SUBSWrr %W4, %W8, %NZCV<imp-def>, %X4<imp-use,kill> STRBBui %W5&lt...
2007 Apr 18
0
[PATCH 9/12] base-into-desc
.../include/asm-i386/system.h 2005-08-08 18:01:31.000000000 -0700 @@ -29,40 +29,6 @@ "2" (prev), "d" (next)); \ } while (0) -#define _set_base(desc,base) do { \ - unsigned long __tmp; \ - typecheck(struct desc_struct *, desc); \ - asm volatile("movw %w5,%2\n\t" \ - "rorl $16,%5\n\t" \ - "movb %b5,%3\n\t" \ - "movb %h5,%4" \ - :"=m"(*(desc)), \ - "=&q" (__tmp) \ - :"m" (*((char *)(desc)+2)), \ - "m" (*...
2006 Apr 28
1
unrooted tree and margins, ape package
...nd would like to be able to get rid of the margins or if the margins are not there, have the plot take up more of the plotting region. Below is an example of one of the trees. cat("(((((R3:500.0,R4:500.0):439.0,L._amplexicaule:500.0):494.8,((W4:500.0,R1:500.0):499.0, W2:500.0):500.0):495.8,(W5:500.0,R2:500.0):491.8):500.0,W1:500.0);", file = "clustal.tre", sep = "\n") clustal.tree4 <- read.tree("clustal.tre") plot(clustal.tree4, type="unrooted", no.margin=TRUE, font=c(1,1,3,1,1,1,1,1,1)) unlink("clustal.tre") text.lab < -c(99....
2007 Apr 24
1
Values greater than 1 or lower than -1 in ARMAacf
Dear all, I need to compute the ACF (autocorrel) of an AR6 process, given the values of its parameters (w1,w2,w3,w4,w5,w6). First, I notice that there is an error as soon as the sum of the wi equals 1 : "Error in drop(.Call("La_dgesv", a, as.matrix(b), tol, PACKAGE = "base")) : system is computationally singular: reciprocal condition number = 1.00757e-18" Secondly, when the...
2009 Mar 24
1
Discriminant analysis - stepwise procedure
...hod for selecting the most relevant environmental variables. The problem is that this function includes a parameter (start.vars) and my results change a lot when I change this variable...Oh my God!!! Then, one possible functionl is not the best for my data... grupo<-stepclass(GROUP~W1+W2+W3+W4+W5+W6+W7+W8+W9+W10, data=BD, method="lda", start.vars = "W1", criterion = "AS", direction = "forward") I have performed a redundancy analysis first, then there is not highly correlated variables in the variables that I include in the stepclass function. Can an...
2007 Apr 18
0
[PATCH 9/12] base-into-desc
.../include/asm-i386/system.h 2005-08-08 18:01:31.000000000 -0700 @@ -29,40 +29,6 @@ "2" (prev), "d" (next)); \ } while (0) -#define _set_base(desc,base) do { \ - unsigned long __tmp; \ - typecheck(struct desc_struct *, desc); \ - asm volatile("movw %w5,%2\n\t" \ - "rorl $16,%5\n\t" \ - "movb %b5,%3\n\t" \ - "movb %h5,%4" \ - :"=m"(*(desc)), \ - "=&q" (__tmp) \ - :"m" (*((char *)(desc)+2)), \ - "m" (*...
2007 Apr 18
0
[PATCH 10/14] i386 / Move descriptor accessors into desc h
.../include/asm-i386/system.h 2005-08-09 20:17:27.000000000 -0700 @@ -29,40 +29,6 @@ "2" (prev), "d" (next)); \ } while (0) -#define _set_base(desc,base) do { \ - unsigned long __tmp; \ - typecheck(struct desc_struct *, desc); \ - asm volatile("movw %w5,%2\n\t" \ - "rorl $16,%5\n\t" \ - "movb %b5,%3\n\t" \ - "movb %h5,%4" \ - :"=m"(*(desc)), \ - "=&q" (__tmp) \ - :"m" (*((char *)(desc)+2)), \ - "m" (*...
2007 Apr 18
0
[PATCH 10/14] i386 / Move descriptor accessors into desc h
.../include/asm-i386/system.h 2005-08-09 20:17:27.000000000 -0700 @@ -29,40 +29,6 @@ "2" (prev), "d" (next)); \ } while (0) -#define _set_base(desc,base) do { \ - unsigned long __tmp; \ - typecheck(struct desc_struct *, desc); \ - asm volatile("movw %w5,%2\n\t" \ - "rorl $16,%5\n\t" \ - "movb %b5,%3\n\t" \ - "movb %h5,%4" \ - :"=m"(*(desc)), \ - "=&q" (__tmp) \ - :"m" (*((char *)(desc)+2)), \ - "m" (*...