search for: vstride

...You can refer below link for more details on Intel GPU assembly and register usage: https://software.intel.com/en-us/articles/introduction-to-gen-assembly I notice the hardware encoding of a register is 16 bit. that is not enough to encode all the register region parameters(regNum, type, hstride, vstride, width,...) in RegisterInfo.td. And I am not sure which is the reasonable place to hold this stride/type/width information for a physical register. Maybe some other .cpp file is more suitable than RegisterInfo.td file? Because I need to change the register region parameters in the bitcast instructi...

...tps://github.com/imirkin/mesa.git nv50-gs or https://github.com/imirkin/mesa/commits/nv50-gs for those who prefer a web ui. Bryan Cain (2): nv50/ir: delay calculation of indirect addresses nv50: add support for geometry shaders Christoph Bumiller (1): nv50/ir: fix PFETCH and add RDSV to get VSTRIDE for GPs Ilia Mirkin (16): nv50: allow vert_count to be >255 nv50/ir: disallow predicates on emit/restart ops nv50/ir: disallow shader input propagation for gp nv50/ir: comment out code to allow input/immed loads nv50/ir: add support for gl_PrimitiveIDIn nv50: properly set the PRIMIT...