search for: vstart

...t will codegen *other* SCEVs). In the latter sense there is a difference between `X` and `(trunc (zext X))` even though both of them produce the same value (and possibly are equally efficient). The example in [1] is roughly like this at the high level: You have an i32 induction variable `V` == `{VStart,+,1}`. `{VStart,+,1}` does not unsigned-overflow given the loop bounds. Two interesting uses in the loop are something like (in this mail by zext I'll always mean zext from i32 to i64) `GEP @Global, zext(V)` and `V ult limit`. Because SCEV can prove that `{VStart,+,1}` does not unsigned-overf...

> Of course, and the point is that, for example, on x86_64, the zext here is free. I'm still trying to understand the problem... > > In the example you provided in your previous e-mail, we choose the solution: > > `GEP @Global, zext(V)` -> `GEP (@Global + zext VStart), {i64 0,+,1}` > `V` -> `trunc({i64 0,+,1}) + VStart` > > instead of the actually-better solution: > > `GEP @Global, zext(V)` -> `GEP @Global, zext({VStart,+,1})` > `V` -> `{VStart,+,1}` > > where LSR never considers the latter case because it transforms: >...

> To back up for a second, how much of this is self-inflicted damage? > IndVarSimplify likes to preemptively widen induction variables. Is > that why you have the extensions here in the first place? In the specific example I was talking about the zext came from our frontend (our FE used to insert these extensions for reasons that are no longer relevant). But you can easily get the same

...b/lib/swiotlb.c @@ -122,11 +122,18 @@ static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev, return phys_to_dma(hwdev, virt_to_phys(address)); } +static bool no_iotlb_memory; + void swiotlb_print_info(void) { unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT; unsigned char *vstart, *vend; + if (no_iotlb_memory) { + pr_warn("software IO TLB: No low mem\n"); + return; + } + vstart = phys_to_virt(io_tlb_start); vend = phys_to_virt(io_tlb_end); @@ -136,7 +143,7 @@ void swiotlb_print_info(void) bytes >> 20, vstart, vend - 1); } -void __init s...

...b/lib/swiotlb.c @@ -122,11 +122,18 @@ static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev, return phys_to_dma(hwdev, virt_to_phys(address)); } +static bool no_iotlb_memory; + void swiotlb_print_info(void) { unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT; unsigned char *vstart, *vend; + if (no_iotlb_memory) { + pr_warn("software IO TLB: No low mem\n"); + return; + } + vstart = phys_to_virt(io_tlb_start); vend = phys_to_virt(io_tlb_end); @@ -136,7 +143,7 @@ void swiotlb_print_info(void) bytes >> 20, vstart, vend - 1); } -void __init s...

This is related to an issue in loop strength reduction [1] that I've been trying to fix on and off for a while. [1] has a more detailed description of the issue and an example, but briefly put, I want LSR to consider formulae that have "Zext T" as base and/or scale registers, and to appropriately rate such formulae. My first attempt[2] at fixing this was buggy and had to be

...n/arm/Booting. */ ctxt->user_regs.r0_usr = 0; /* SBZ */ @@ -125,7 +127,7 @@ static int vcpu_arm32(struct xc_dom_image *dom, void *ptr) * like a valid pointer to a set of ATAGS or a DTB. */ ctxt->user_regs.r2_usr = dom->devicetree_blob ? - dom->devicetree_seg.vstart : 0xffffffff; + (dom->devicetree_seg.vstart - offset) : 0xffffffff; ctxt->sctlr = SCTLR_GUEST_INIT; @@ -280,15 +282,15 @@ int arch_setup_meminit(struct xc_dom_image *dom) if ( dom->devicetree_blob ) { - const uint64_t rambase = dom->rambase_pfn <&lt...

...dgamma(c(363328L, 376216L, 367032L, 314826L, 311892L, 313340L, : NaNs produced Warning in dgamma(c(363328L, 376216L, 367032L, 314826L, 311892L, 313340L, : NaNs produced Warning in dgamma(c(363328L, 376216L, 367032L, 314826L, 311892L, 313340L, : NaNs produced [1] "Error in optim(par = vstart, fn = fnobj, fix.arg = fix.arg, obs = data, : \n non-finite finite-difference value [2]\n" attr(,"class") [1] "try-error" attr(,"condition") <simpleError in optim(par = vstart, fn = fnobj, fix.arg = fix.arg, obs = data, ddistnam = ddistname, hessian = TRU...

...on.h> - -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) #include <asm/tlbflush.h> -#else -#define pte_offset_kernel pte_offset -#define pud_t pgd_t -#define pud_offset(d, va) d -#endif struct dma_coherent_mem { void *virt_base; @@ -85,24 +78,13 @@ xen_contig_memory(unsigned long vstart, balloon_unlock(flags); } -#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) -void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size, - dma_addr_t *dma_handle) -#else void *dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, int gfp) -#endif { vo...

...on this list sent me: ...................................................................... X <- # See end of this message for the X data x1 <- X[, 1] x2 <- X[, 2] fun <- function(q) { mu <- 0.1 max(abs(v)) + (sum(v*x1)^2 + (1-sum(x2*v))^2)/(2*mu) } vstart <- # feasible starting value. See end of this post. sol <- optim(vstart, fun, method="L-BFGS-B", lower=rep(-1, 100), upper=rep(1,100)) max(abs(sol$par)) ......................................................................... This gets quite near, around 0.015-0.01...

Hi, There is now an RFC for a roadmap to native vector predication support in LLVM and a prototype implementation:   https://reviews.llvm.org/D57504 The prototype demonstrates: -  Predicated vector intrinsics with an explicit mask and vector length parameter on IR level. -  First-class predicated SDNodes on ISel level. Mask and vector length are value operands. -  An incremental strategy

Hi, Is there a reason that the allocate_empty_lowmem_region() function in hypervisor.c is only available in Domain 0. It is only included if CONFIG_XEN_PHYSDEV_ACCESS is defined, however, when I remove this it seems to work fine in DomUs. Thanks, Ross _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

Hi all, this patch series enables xen-swiotlb on arm and arm64. It has been heavily reworked compared to the previous versions in order to achieve better performances and to address review comments. We are not using dma_mark_clean to ensure coherency anymore. We call the platform implementation of map_page and unmap_page. We assume that dom0 has been mapped 1:1 (physical address == machine

...ELF image\n", + __FUNCTION__); + return rc; + } + + /* parse binary and get xen meta info */ + elf_parse_binary(elf); + if ( (rc = elf_xen_parse(elf, &dom->parms)) != 0 ) + return rc; + + /* find kernel segment */ + dom->kernel_seg.vstart = dom->parms.virt_kstart; + dom->kernel_seg.vend = dom->parms.virt_kend; + + if ( dom->parms.bsd_symtab ) + xc_dom_load_elf_symtab(dom, elf, 0); + + dom->guest_type = xc_dom_guest_type(dom, elf); + xc_dom_printf("%s: %s: 0x%" PRIx64 " -> 0x%&quo...

...ELF image\n", + __FUNCTION__); + return rc; + } + + /* parse binary and get xen meta info */ + elf_parse_binary(elf); + if ( (rc = elf_xen_parse(elf, &dom->parms)) != 0 ) + return rc; + + /* find kernel segment */ + dom->kernel_seg.vstart = dom->parms.virt_kstart; + dom->kernel_seg.vend = dom->parms.virt_kend; + + if ( dom->parms.bsd_symtab ) + xc_dom_load_elf_symtab(dom, elf, 0); + + dom->guest_type = xc_dom_guest_type(dom, elf); + xc_dom_printf("%s: %s: 0x%" PRIx64 " -> 0x%&quo...

...ELF image\n", + __FUNCTION__); + return rc; + } + + /* parse binary and get xen meta info */ + elf_parse_binary(elf); + if ( (rc = elf_xen_parse(elf, &dom->parms)) != 0 ) + return rc; + + /* find kernel segment */ + dom->kernel_seg.vstart = dom->parms.virt_kstart; + dom->kernel_seg.vend = dom->parms.virt_kend; + + if ( dom->parms.bsd_symtab ) + xc_dom_load_elf_symtab(dom, elf, 0); + + dom->guest_type = xc_dom_guest_type(dom, elf); + xc_dom_printf("%s: %s: 0x%" PRIx64 " -> 0x%&quo...

...o fit an exponential model to my data. I have 4 different datasets. For 3 datasets nls seems to work fine and I have no error messages. But for 1 dataset I am getting the "world known" singular gradient error. xfit.dNEE <- nls(vario.dNEE~V*(1-exp(-1*dist/L)),data=ndat,start=list(V=vstart,L=lstart),trace=T) I tried also with different starting values but still the same error... Any help would be highly welcome. Thank you in advance. -- View this message in context: http://r.789695.n4.nabble.com/nls-singular-gradient-as-always-tp4669859.html Sent from the R help mailing lis...

I''ve addressed all (I think/hope) of the review comments. The main change is to expose the guest virtual platform (e.g. memory layout and interrupt usage etc) to the toolstack via the public interface. This is then used during FDT generation. I have just codified the current defacto standard layout, it''s probably not the best layout but any change can be a separate patch/series.

Hello, This patch series adds an initial implementation of restriper (it''s a clever name for relocation framework that allows to do selective profile changing and selective balancing with some goodies like pausing/resuming and reporting progress to the user. Profile changing is global (per-FS) so far, per-subvolume profiles require some discussion and can be implemented in future.

...-git a/tools/libxc/xc_dom_arm.c b/tools/libxc/xc_dom_arm.c index ffe575b..366061d 100644 --- a/tools/libxc/xc_dom_arm.c +++ b/tools/libxc/xc_dom_arm.c @@ -290,6 +290,8 @@ int arch_setup_meminit(struct xc_dom_image *dom) else /* otherwise at top of RAM */ dom->devicetree_seg.vstart = ramend - dtbsize; + dom->devicetree_seg.vstart &= XC_PAGE_MASK; + dom->devicetree_seg.vend = dom->devicetree_seg.vstart + dom->devicetree_size; DOMPRINTF("%s: devicetree: 0x%" PRIx64 " -> 0x%" PRIx64 "", --...