search for: vscaleconst

Displaying 3 results from an estimated 3 matches for "vscaleconst".

2018 Jun 06
2
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths
...he scaled >> part by vscale and add the unscaled as is. > > Ok, now I understand what you're getting at. A ConstantExpr would > encapsulate this computation. We alreay have "non-static-constant" > values for ConstantExpr like sizeof and offsetof. I would see > VScaleConstant in that same tradition. In your struct example, > getSizeExpressionInBits would return: > > add(mul(256, vscale), 64) > > Does that satisfy your needs? Ah, I think the use of 'expression' in the name definitely confuses the issue then. This isn't for expressing the...
2018 Jun 05
3
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths
Hi David, Thanks for taking a look. > On 5 Jun 2018, at 16:23, dag at cray.com wrote: > > Hi Graham, > > Just a few initial comments. > > Graham Hunter <Graham.Hunter at arm.com> writes: > >> ``<scalable x 4 x i32>`` and ``<scalable x 8 x i16>`` have the same number of >> bytes. > > "scalable" instead of "scalable
2018 Jun 07
3
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths
...at lists.llvm.org> writes: > >>> Ok, now I understand what you're getting at. A ConstantExpr would >>> encapsulate this computation. We alreay have "non-static-constant" >>> values for ConstantExpr like sizeof and offsetof. I would see >>> VScaleConstant in that same tradition. In your struct example, >>> getSizeExpressionInBits would return: >>> >>> add(mul(256, vscale), 64) >>> >>> Does that satisfy your needs? >> >> Ah, I think the use of 'expression' in the name definitely...