search for: vring_bench_noshadow

...========================================================== (note -- w/ core turbo disabled, performance is _very_ stable; variance of < 0.5% run-to-run; figure of merit is "seconds elapsed" here) * Producer / consumer bound to Hyperthread pairs: Performance counter stats for './vring_bench_noshadow 1000000000': 343,425,166,916 L1-dcache-loads 21,393,148 L1-dcache-load-misses # 0.01% of all L1-dcache hits 61,709,640,363 L1-dcache-stores 5,745,690 L1-dcache-store-misses 10,186,932,553 L1-dcache-prefetches 1,491 L1-dcache-prefetch-misses 121.335699344...

...========================================================== (note -- w/ core turbo disabled, performance is _very_ stable; variance of < 0.5% run-to-run; figure of merit is "seconds elapsed" here) * Producer / consumer bound to Hyperthread pairs: Performance counter stats for './vring_bench_noshadow 1000000000': 343,425,166,916 L1-dcache-loads 21,393,148 L1-dcache-load-misses # 0.01% of all L1-dcache hits 61,709,640,363 L1-dcache-stores 5,745,690 L1-dcache-store-misses 10,186,932,553 L1-dcache-prefetches 1,491 L1-dcache-prefetch-misses 121.335699344...

...============================ > (note -- w/ core turbo disabled, performance is _very_ stable; variance of > < 0.5% run-to-run; figure of merit is "seconds elapsed" here) > > * Producer / consumer bound to Hyperthread pairs: > > Performance counter stats for './vring_bench_noshadow 1000000000': > > 343,425,166,916 L1-dcache-loads > 21,393,148 L1-dcache-load-misses # 0.01% of all L1-dcache hits > 61,709,640,363 L1-dcache-stores > 5,745,690 L1-dcache-store-misses > 10,186,932,553 L1-dcache-prefetches > 1,491 L1-dcach...

...====== >> (note -- w/ core turbo disabled, performance is _very_ stable; variance of >> < 0.5% run-to-run; figure of merit is "seconds elapsed" here) >> >> * Producer / consumer bound to Hyperthread pairs: >> >> Performance counter stats for './vring_bench_noshadow 1000000000': >> >> 343,425,166,916 L1-dcache-loads >> 21,393,148 L1-dcache-load-misses # 0.01% of all L1-dcache hits >> 61,709,640,363 L1-dcache-stores >> 5,745,690 L1-dcache-store-misses >> 10,186,932,553 L1-dcache-prefetches >&gt...

On Wed, Nov 11, 2015 at 02:34:33PM +0200, Michael S. Tsirkin wrote: > On Tue, Nov 10, 2015 at 04:21:07PM -0800, Venkatesh Srinivas wrote: > > Improves cacheline transfer flow of available ring header. > > > > Virtqueues are implemented as a pair of rings, one producer->consumer > > avail ring and one consumer->producer used ring; preceding the > > avail ring

On Wed, Nov 11, 2015 at 02:34:33PM +0200, Michael S. Tsirkin wrote: > On Tue, Nov 10, 2015 at 04:21:07PM -0800, Venkatesh Srinivas wrote: > > Improves cacheline transfer flow of available ring header. > > > > Virtqueues are implemented as a pair of rings, one producer->consumer > > avail ring and one consumer->producer used ring; preceding the > > avail ring