Displaying 4 results from an estimated 4 matches for "vrev".
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vdev
2011 Oct 08
0
[LLVMdev] LLC ARM Backend maintainer
Hi Nadav,
> The new type-legalization mode (-promote-elements) which enables vector-select in LLVM (and a nice perf boost for several workloads), is currently disabled because of a _single_ bug in the ARM codegen which makes a few tests fail. If ARM is not a supported target, can I mark these tests as 'XFAIL' and enable vector-select support in LLVM ?
Which testcase is it?
--
With
2004 May 20
0
theora header bitmap for alpha3
...from oggz_auto.h]
/**
* Theora
*
* Default field type: BIG ENDIAN unsigned integer
*
Field names in full caps refer to fields described in the Theora I
specification. Lowercase refers to theora_info struct members from
libtheora.
This is the Theora header for theora-alpha3:
(VMAJ=3, VMIN=2, VREV=0)
0 1 2 3
0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1| Byte
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
| packtype | Identifier char[6]: 'theora' | 0-3
+-+-+-+-+-+-+-+-+...
2011 Oct 08
4
[LLVMdev] LLC ARM Backend maintainer
Hi Tanya,
The new type-legalization mode (-promote-elements) which enables vector-select in LLVM (and a nice perf boost for several workloads), is currently disabled because of a _single_ bug in the ARM codegen which makes a few tests fail. If ARM is not a supported target, can I mark these tests as 'XFAIL' and enable vector-select support in LLVM ?
Thanks,
Nadav
-----Original
2004 Oct 31
3
a question about Bitstream Header.
Hi,
I have a question about the format of Theora bitstream header.
It seems to me that there are differences between the specification[1]
(version 2004 Oct 1) and its reference implementation in
libtheora 1.0alpha3 released at 2004 Jun 1.
I mean that... please refer to Section 6.2 'Identification Header Decode'
in that specification[1] and the function