Displaying 10 results from an estimated 10 matches for "vres".
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2008 Feb 18
3
help with x config on centos 5.1
...ding ModePool for DFP-0 ---
(II) NVIDIA(0):
(II) NVIDIA(0): Native backend timings for DFP-0:
(II) NVIDIA(0): 640 x 480 @ 60 Hz
(II) NVIDIA(0): Pixel Clock : 25.175 MHz
(II) NVIDIA(0): HRes, HSyncStart : 640, 656
(II) NVIDIA(0): HSyncEnd, HTotal : 752, 800
(II) NVIDIA(0): VRes, VSyncStart : 480, 490
(II) NVIDIA(0): VSyncEnd, VTotal : 492, 525
(II) NVIDIA(0): H/V Polarity : -/-
(II) NVIDIA(0):
(II) NVIDIA(0): Validating Mode "1920x1080":
(II) NVIDIA(0): 1920 x 1080 @ 60 Hz
(II) NVIDIA(0): Mode Source: X Configuration file ModeLine
(II)...
2015 Aug 10
4
EFI: HP + syslinux = crash [ brown paper bag update ]
...ory.default open_file
pxelinux.cfg/category.default
| searchdir: pxelinux.cfg/category.default root: 0x0000000000000000
cwd: 0x0000000000000000
| PXE: file = 0x00000000772faaf8, retries left = 0: ok
| ok
| Hello, World! (initvesa.c)
| Hello, World! (vesa.c)
| mode 0 version 0 pixlfmt 1 hres=1024 vres=768
| mode_num = 0 query_status 0
| mode 0 hres=640 vres=480
| BGR8bit bpp 32 pixperScanLine 640 logical_scan 2560 bytesperPix 4
| Success setting mode 0
| Mode set, now drawing at 0x0000000091000000
| Ready!
| open_file bootlogo.png
| searchdir: bootlogo.png root: 0x0000000000000000 cwd: 0x00000...
2015 Aug 05
3
EFI: HP + syslinux = crash [ brown paper bag update ]
On Wed, Aug 5, 2015 at 3:03 PM, Oscar Roozen via Syslinux
<syslinux at zytor.com> wrote:
> Unfortunately I can't test anymore until Friday. Maybe gnu-efi got
> updated? I seem to remember seeing a shell script pulling in the
> newest version during compilation...
It's version locked to a certain commit ID.
--
-Gene
2018 Jan 03
2
Nvidia maximum pixel clock issue in kmod-nvidia-384.98
...VIDIA(GPU-0): 1920 x 1200 @ 60 Hz
[ 1354.589] (WW) NVIDIA(GPU-0): Pixel Clock : 154.00 MHz
[ 1354.589] (WW) NVIDIA(GPU-0): HRes, HSyncStart : 1920, 1968
[ 1354.589] (WW) NVIDIA(GPU-0): HSyncEnd, HTotal : 2000, 2080
[ 1354.589] (WW) NVIDIA(GPU-0): VRes, VSyncStart : 1200, 1203
[ 1354.589] (WW) NVIDIA(GPU-0): VSyncEnd, VTotal : 1209, 1235
[ 1354.589] (WW) NVIDIA(GPU-0): Sync Polarity : +H -V
[ 1354.589] (WW) NVIDIA(GPU-0): Mode is rejected: PixelClock
(154.0 MHz) too high for
[ 1354.589] (WW) NVIDIA(GPU-0):...
2018 Jan 03
0
Nvidia maximum pixel clock issue in kmod-nvidia-384.98
...1200 @ 60 Hz
> [ 1354.589] (WW) NVIDIA(GPU-0): Pixel Clock : 154.00 MHz
> [ 1354.589] (WW) NVIDIA(GPU-0): HRes, HSyncStart : 1920, 1968
> [ 1354.589] (WW) NVIDIA(GPU-0): HSyncEnd, HTotal : 2000, 2080
> [ 1354.589] (WW) NVIDIA(GPU-0): VRes, VSyncStart : 1200, 1203
> [ 1354.589] (WW) NVIDIA(GPU-0): VSyncEnd, VTotal : 1209, 1235
> [ 1354.589] (WW) NVIDIA(GPU-0): Sync Polarity : +H -V
> [ 1354.589] (WW) NVIDIA(GPU-0): Mode is rejected: PixelClock
> (154.0 MHz) too high for
> [ 13...
2009 Aug 29
0
Training failed with hylafax
...6.61: [ 9568]: --> [7:CONNECT]
Aug 29 09:45:46.67: [ 9568]: --> [2:OK]
Aug 29 09:45:46.67: [ 9568]: REMOTE best rate 9600 bit/s
Aug 29 09:45:46.67: [ 9568]: REMOTE max A4 page width (215 mm)
Aug 29 09:45:46.67: [ 9568]: REMOTE max unlimited page length
Aug 29 09:45:46.67: [ 9568]: REMOTE best vres 15.4 line/mm
Aug 29 09:45:46.67: [ 9568]: REMOTE format support: MH, MR
Aug 29 09:45:46.67: [ 9568]: REMOTE best 20 ms/scanline
Aug 29 09:45:46.67: [ 9568]: USE 9600 bit/s
Aug 29 09:45:46.67: [ 9568]: SEND file "docq/doc60.tif;70"
Aug 29 09:45:46.67: [ 9568]: USE A4 page width (215 mm)
Au...
2014 Oct 07
1
index problem with only 1 folder of 1 box
Hello,
First of all, sorry for my poor english level.
I pass to solr indexing.
All is OK, except for the inbox of one of the mailboxes. For this inbox
(other folders of the same mailbox have no problems), when i do text
search, there is always no response.
Others mailboxes have no problems.
If i do a : "doveadm -Dv fts rescan -u mybox at domain.tld", i can do one
and only one
2012 Nov 19
2
[PATCH 158/493] video: remove use of __devinit
...b_set_vclock(PICOS2KHZ(var->pixclock) * 1000, iga);
}
-void __devinit viafb_init_chip_info(int chip_type)
+void viafb_init_chip_info(int chip_type)
{
via_clock_init(&clock, chip_type);
init_gfx_chip_info(chip_type);
@@ -1540,7 +1540,7 @@ void viafb_update_device_setting(int hres, int vres, int bpp, int flag)
}
}
-static void __devinit init_gfx_chip_info(int chip_type)
+static void init_gfx_chip_info(int chip_type)
{
u8 tmp;
@@ -1593,7 +1593,7 @@ static void __devinit init_gfx_chip_info(int chip_type)
}
}
-static void __devinit init_tmds_chip_info(void)
+static void in...
2012 Nov 19
2
[PATCH 158/493] video: remove use of __devinit
...b_set_vclock(PICOS2KHZ(var->pixclock) * 1000, iga);
}
-void __devinit viafb_init_chip_info(int chip_type)
+void viafb_init_chip_info(int chip_type)
{
via_clock_init(&clock, chip_type);
init_gfx_chip_info(chip_type);
@@ -1540,7 +1540,7 @@ void viafb_update_device_setting(int hres, int vres, int bpp, int flag)
}
}
-static void __devinit init_gfx_chip_info(int chip_type)
+static void init_gfx_chip_info(int chip_type)
{
u8 tmp;
@@ -1593,7 +1593,7 @@ static void __devinit init_gfx_chip_info(int chip_type)
}
}
-static void __devinit init_tmds_chip_info(void)
+static void in...
2012 Nov 19
2
[PATCH 158/493] video: remove use of __devinit
...b_set_vclock(PICOS2KHZ(var->pixclock) * 1000, iga);
}
-void __devinit viafb_init_chip_info(int chip_type)
+void viafb_init_chip_info(int chip_type)
{
via_clock_init(&clock, chip_type);
init_gfx_chip_info(chip_type);
@@ -1540,7 +1540,7 @@ void viafb_update_device_setting(int hres, int vres, int bpp, int flag)
}
}
-static void __devinit init_gfx_chip_info(int chip_type)
+static void init_gfx_chip_info(int chip_type)
{
u8 tmp;
@@ -1593,7 +1593,7 @@ static void __devinit init_gfx_chip_info(int chip_type)
}
}
-static void __devinit init_tmds_chip_info(void)
+static void in...