Displaying 4 results from an estimated 4 matches for "vregdef".
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vregdefs
2012 Jun 13
0
[LLVMdev] Assert in live update from MI scheduler.
Andy,
I traced my problem to this point:
In ScheduleDAGInstrs.cpp we have the following function:
/// addVRegDefDeps - Add register output and data dependencies from this
SUnit
/// to instructions that occur later in the same scheduling region if they
read
/// from or write to the virtual register defined at OperIdx.
///
/// TODO: Hoist loop induction variable increments. This has to be
/// reevaluated. Gener...
2012 Jun 13
2
[LLVMdev] Assert in live update from MI scheduler.
...te:
> So if this early exit is taken:
>
> // SSA defs do not have output/anti dependencies.
> // The current operand is a def, so we have at least one.
> if (llvm::next(MRI.def_begin(Reg)) == MRI.def_end())
> return;
>
> we do not ever get to this point:
>
> VRegDefs.insert(VReg2SUnit(Reg, SU));
>
> But later, when checking for anti dependency for another MI here:
>
> void ScheduleDAGInstrs::addVRegUseDeps(SUnit *SU, unsigned OperIdx) {
> ...
> // Add antidependence to the following def of the vreg it uses.
> VReg2SUnitMap::iterator De...
2012 Jun 13
4
[LLVMdev] Assert in live update from MI scheduler.
Andy,
Thanks for reply. I was able to trace the problem to the MI DAG dep
constructor. See this:
SU(0): %vreg1<def> = COPY %vreg10<kill>; IntRegs:%vreg1,%vreg10
# preds left : 0
# succs left : 0
# rdefs left : 1
Latency : 1
Depth : 0
Height : 0
SU(1): %vreg10<def> = LDriw %vreg9<kill>, 0;
2012 Jun 13
0
[LLVMdev] Assert in live update from MI scheduler.
...Sergei Larin <slarin at codeaurora.org> wrote:
So if this early exit is taken:
// SSA defs do not have output/anti dependencies.
// The current operand is a def, so we have at least one.
if (llvm::next(MRI.def_begin(Reg)) == MRI.def_end())
return;
we do not ever get to this point:
VRegDefs.insert(VReg2SUnit(Reg, SU));
But later, when checking for anti dependency for another MI here:
void ScheduleDAGInstrs::addVRegUseDeps(SUnit *SU, unsigned OperIdx) {
...
// Add antidependence to the following def of the vreg it uses.
VReg2SUnitMap::iterator DefI = VRegDefs.find(Reg);
if (DefI...