search for: vreg80

...must be consecutive registers. Operand 1 has no particular constraint. It has no output register. So we have something like MPQD R_n, R_x, R_n+1. I have derived from PBQPBuilder to add the MPQD constraint. It happens sometimes that the code for register allocation looks like this : ... MPQD %vreg80, %vreg79, %vreg80; GR16:%vreg80,%vreg79 ... Operands 0 & 2 have been coalesced and I can no longer set the constraint. I tried to add a pass right before register allocation, to catch those case and insert a copy for operand 2, but the copy gets coalesced away. What would be the appropriat...

...Operand 1 has no particular constraint. It has no output register. So we have something like MPQD R_n, R_x, R_n+1. > > I have derived from PBQPBuilder to add the MPQD constraint. > > It happens sometimes that the code for register allocation looks like this : > ... > MPQD %vreg80, %vreg79, %vreg80; GR16:%vreg80,%vreg79 > ... > Operands 0 & 2 have been coalesced and I can no longer set the constraint. > > I tried to add a pass right before register allocation, to catch those case and insert a copy for operand 2, but the copy gets coalesced away. > &...

...has no particular constraint. It has no output register. > So we have something like MPQD R_n, R_x, R_n+1. > > I have derived from PBQPBuilder to add the MPQD constraint. > > It happens sometimes that the code for register allocation looks > like this : > ... > MPQD %vreg80, %vreg79, %vreg80; GR16:%vreg80,%vreg79 > ... > Operands 0 & 2 have been coalesced and I can no longer set the > constraint. > > I tried to add a pass right before register allocation, to catch > those case and insert a copy for operand 2, but the copy gets > coale...

...ain, no reason is given why only the first terminator is allowed to use the register. The offending code is: (gdb) p opBlock.dump() BB#8: derived from LLVM BB %for.cond Predecessors according to CFG: BB#7 BB#22 BB#19 BB#16 BB#11 BB#27 BB#26 BB#25 BB#24 BB#23 %vreg18<def> = COPY %vreg80<kill>; GEXR16:%vreg18,%vreg80 ADJCALLSTACKDOWN 0, %SP<imp-def>, %EX<imp-def>, %SP<imp-use> CALLi <ga:@clock_get_ticks>, <regmask>, %SP<imp-use>, %SP<imp-def>, %A<imp-def>, ... ADJCALLSTACKUP 0, 0, %SP<imp-def>, %EX&...