search for: vreg1957

...RegisterInfo::defusechain_instr_iterator::advance seems to skip all def operands for use_bundle_nodbg_iterator since ReturnDefs is false. So it will happily advance past the instruction setting lo16.) Then after the remats it does spillAroundUses %vreg1954 and there I get reload: 5052r %vreg1957<def> = Load40FI <fi#2> rewrite: 5056r %vreg1957:lo16<def> = mv_nimm6_ar16 0 since no remat was inserted before 5056. But noone has stored anything at fi#2 so I end up with *** Bad machine code: Instruction loads from dead spill slot *** Does everything above, except the err...

Hi Quentin, On 08/15/14 19:01, Quentin Colombet wrote: [...] >> The question is: How should true subregister definitions be >> expressed so that they do not interfere with each other? See the >> detailed problem description below. > > We do have a limitation in our current liveness tracking for > sub-register. Therefore, I am not sure that is possible. > >