Displaying 3 results from an estimated 3 matches for "vreg195".
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vreg15
2013 Feb 08
2
[LLVMdev] help with X86 DAG->DAG Instruction Selection
...FR64:%vreg191
%vreg192<def> = MOVSDrm <fi#0>, 1, %noreg, 88, %noreg; mem:LD8[%92]
FR64:%vreg192
%vreg193<def> = MOVSDrm <fi#0>, 1, %noreg, 24, %noreg; mem:LD8[%89]
FR64:%vreg193
%vreg194<def> = MOVSDrm <fi#0>, 1, %noreg, 80, %noreg; mem:LD8[%94]
FR64:%vreg194
%vreg195<def> = MOV32ri 8; GR32:%vreg195
%EAX<def> = COPY %vreg195; GR32:%vreg195
WIN_ALLOCA %EAX<imp-def,dead>, %ESP<imp-def,dead>, %EFLAGS<imp-def,dead>,
%ESP<imp-use>
%vreg196<def> = COPY %ESP; GR32:%vreg196
MOV32mr %vreg196, 1, %noreg, 0, %noreg, %vreg16; mem:...
2013 Feb 08
0
[LLVMdev] help with X86 DAG->DAG Instruction Selection
...vreg192<def> = MOVSDrm <fi#0>, 1, %noreg, 88, %noreg; mem:LD8[%92] FR64:%vreg192
> %vreg193<def> = MOVSDrm <fi#0>, 1, %noreg, 24, %noreg; mem:LD8[%89] FR64:%vreg193
> %vreg194<def> = MOVSDrm <fi#0>, 1, %noreg, 80, %noreg; mem:LD8[%94] FR64:%vreg194
> %vreg195<def> = MOV32ri 8; GR32:%vreg195
> %EAX<def> = COPY %vreg195; GR32:%vreg195
> WIN_ALLOCA %EAX<imp-def,dead>, %ESP<imp-def,dead>, %EFLAGS<imp-def,dead>, %ESP<imp-use>
> %vreg196<def> = COPY %ESP; GR32:%vreg196
> MOV32mr %vreg196, 1, %noreg, 0,...
2012 Feb 10
1
[LLVMdev] Question about /llvm/trunk/lib/CodeGen/MachineScheduler.cpp
...Scheduler pass if you want.
-Andy
> Thanks.
>
> Sergei
>
>
> BB#4: derived from LLVM BB %cond.end
> Predecessors according to CFG: BB#3 BB#2
> %vreg194<def> = ADDr_MPYir_V4 %vreg185, 120, %vreg187<kill>;
> IntRegs:%vreg194,%vreg185,%vreg187
> %vreg195<def> = CONST32_set <ga:@raac_sfBandTabShortOffset>;
> IntRegs:%vreg195
> ....
> %vreg306<def> = TFRI 127; IntRegs:%vreg306
> %vreg307<def> = TFRI 1; IntRegs:%vreg307
> %vreg438<def> = COPY %vreg193; IntRegs:%vreg438,%vreg193
> %vreg362<...