Displaying 2 results from an estimated 2 matches for "vreg166".
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2017 Jul 20
3
Issue with DAG legalization of brcond, setcc, xor
...t10: i32 = add t6, t9
t12: i32,ch = CopyFromReg t0, Register:i32 %vreg79
t15: i32,ch = CopyFromReg t0, Register:i32 %vreg1
t16: ch = llvm.tpu.dma.write.1KB.async t0,
TargetConstant:i32<4602>, t10, t12, t15
t18: i32,ch = CopyFromReg t0, Register:i32 %vreg166
t20: i32 = AssertZext t18, ValueType:ch:i1
t23: i1 = setcc t20, Constant:i32<0>, seteq:ch
t25: i32,ch = CopyFromReg t0, Register:i32 %vreg396
t28: i1 = setcc t25, Constant:i32<255>, setugt:ch
t29: i1 = and t23, t28
t37: i1 = setc...
2017 Jul 21
4
Issue with DAG legalization of brcond, setcc, xor
...t; t12: i32,ch = CopyFromReg t0, Register:i32 %vreg79
>> t15: i32,ch = CopyFromReg t0, Register:i32 %vreg1
>> t16: ch = llvm.tpu.dma.write.1KB.async t0, TargetConstant:i32<4602>, t10, t12, t15
>> t18: i32,ch = CopyFromReg t0, Register:i32 %vreg166
>> t20: i32 = AssertZext t18, ValueType:ch:i1
>> t23: i1 = setcc t20, Constant:i32<0>, seteq:ch
>> t25: i32,ch = CopyFromReg t0, Register:i32 %vreg396
>> t28: i1 = setcc t25, Constant:i32<255>, setugt:ch
>>...