Displaying 2 results from an estimated 2 matches for "vreg1075".
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reg1075
2009 Mar 25
2
[LLVMdev] Register allocation of stack slots
...output of the initialization of several stack slots is the following:
1 : entry:
2 : %reg1074<def> = movC 0
3 : Store: store <fi#18>, 0, %R0<kill>
4 : Remembering SS#18 in physreg R0
5 : store <fi#18>, 0, %R0<kill>
6 : Reusing SS#18 from physreg R0 for vreg1075 instead of reloading into physreg R0
7 : store <fi#9>, 0, %R0, Mem:ST(2,2) [sig5069_nl + 0]
8 : Reusing SS#18 from physreg R0 for vreg1076 instead of reloading into physreg R0
9 : store <fi#8>, 0, %R0, Mem:ST(2,2) [sig5069_nc + 0]
10: %R0<def> = movC 16384
11: PhysRe...
2009 Mar 25
0
[LLVMdev] Register allocation of stack slots
...tack
> slots is the following:
>
> 1 : entry:
> 2 : %reg1074<def> = movC 0
> 3 : Store: store <fi#18>, 0, %R0<kill>
> 4 : Remembering SS#18 in physreg R0
> 5 : store <fi#18>, 0, %R0<kill>
> 6 : Reusing SS#18 from physreg R0 for vreg1075 instead of reloading
> into physreg R0
> 7 : store <fi#9>, 0, %R0, Mem:ST(2,2) [sig5069_nl + 0]
> 8 : Reusing SS#18 from physreg R0 for vreg1076 instead of reloading
> into physreg R0
> 9 : store <fi#8>, 0, %R0, Mem:ST(2,2) [sig5069_nc + 0]
> 10: %R0&l...