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v46
2011 Jul 14
0
[LLVMdev] Error in a custom analysis Pass
Hi,
I am writing an analysis pass for a custom processor. I get an unusual
situation where the code generated for a BB is
BB#23: derived from LLVM BB %sw.bb99
Live Ins: %vr2 %vr0 %vr1 %vr9 %vr3 %vr8 %vr4 %vr5 %vr6
Predecessors according to CFG: BB#22
%vr46<def> = LD_Iri %LV, -4; mem:LD4[FixedStack0]
%vr7<def> = ADDri %vr9, 1
%vr47<def> = ADDri %vr46, -4
ST_Iri %LV, -4, %vr47<kill>; mem:ST4[%cpArg.addr]
>>> %vr48<def> = LD_Iri %vr46<kill>, 0; mem:LD4[<unknown>]
ST_C...