search for: vpsrld

...i7-avx: $ clang++ test.cpp -O3 -fstrict-aliasing -funroll-loops -ffast-math -march=native -mtune=native -DSPILLING_ENSUES=0 /* no spilling */ $ objdump -dC --no-show-raw-insn ./a.out ... 00000000004004f0 <main>: 4004f0: vmovdqa 0x2004c8(%rip),%xmm0 # 6009c0 <x> 4004f8: vpsrld $0x17,%xmm0,%xmm0 4004fd: vpaddd 0x17b(%rip),%xmm0,%xmm0 # 400680 <__dso_handle+0x8> 400505: vcvtdq2ps %xmm0,%xmm1 400509: vdivps 0x17f(%rip),%xmm1,%xmm1 # 400690 <__dso_handle+0x18> 400511: vcvttps2dq %xmm1,%xmm1 400515: vpmullw 0x183(%rip),%xmm1,%xmm1...

...; is generated for the intrinsic. > > vpshufd $78, %xmm0, %xmm1 # xmm1 = xmm0[2,3,0,1] > vpor %xmm1, %xmm0, %xmm0 > vpshufd $229, %xmm0, %xmm1 # xmm1 = xmm0[1,1,2,3] > vpor %xmm1, %xmm0, %xmm0 > vpsrld $16, %xmm0, %xmm1 > vpor %xmm1, %xmm0, %xmm0 > vpextrb $0, %xmm0, %eax > > > However, on AArche64 I encountered an unreachable where codegen does not > know how to promote the i1 type. Since I am more familiar with the > midlevel I ha...

...> vpshufd $78, %xmm0, %xmm1 # xmm1 = xmm0[2,3,0,1] > > vpor %xmm1, %xmm0, %xmm0 > > vpshufd $229, %xmm0, %xmm1 # xmm1 = xmm0[1,1,2,3] > > vpor %xmm1, %xmm0, %xmm0 > > vpsrld $16, %xmm0, %xmm1 > > vpor %xmm1, %xmm0, %xmm0 > > vpextrb $0, %xmm0, %eax > > > > > > However, on AArche64 I encountered an unreachable where > codegen does not > > know how to promote th...

Hi Amara, thank you for the clarification. I tested the intrinsics x86_64 and it seemed to work pretty well. Looking forward to try this intrinsics with the AArch64 backend. Maybe I find the time to look into codegen to get this intrinsics out of experimental stage. They seem pretty useful. Cheers, Michael -----Original Message----- From: Amara Emerson [amara.emerson at gmail.com] Received: