Displaying 2 results from an estimated 2 matches for "vpslldq".
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pslldq
2014 Sep 20
2
[LLVMdev] Please benchmark new x86 vector shuffle lowering, planning to make it the default very soon!
On Sat, Sep 20, 2014 at 7:12 AM, Simon Pilgrim <llvm-dev at redking.me.uk>
wrote:
> Hi Andrea / Chandler / Quentin,
>
> If AVX is available I would expect the vpermilps/vpermilpd instruction to
> be used for all float/double single vector shuffles, especially as it can
> deal with the folded load case as well - this would avoid the integer/float
> execution domain
2014 Sep 23
2
[LLVMdev] Please benchmark new x86 vector shuffle lowering, planning to make it the default very soon!
...plemented yet.
> >
> > Well, actually it is, but I haven't finished writing tests for it. =]
>
> Thanks Chandler - vpermilps/vpermilpd generation looks great now.
>
> I've found another regression - byte shifts on pre-ssse3 targets are
> failing to make use of the vpslldq/vpsrldq instructions - I've attached
> some basic test cases.
>
> Could vpslldq/vpsrldq be used on ssse3+ targets for the cases where zeros
> are being shifted in? It avoids the need for a zero register (although they
> aren't as good for memory folding).
I'm curious, h...