Displaying 3 results from an estimated 3 matches for "vpmovsx".
2012 Feb 08
2
[LLVMdev] SelectionDAG scalarizes vector operations.
Duncan,
I had a few thoughts regarding our short discussion yesterday.
I am not sure how we can lower SEXT into the vpmovsx family of instructions. I propose the following strategy for the ZEXT and ANYEXT family of functions. At first, we let the Type Legalizer/VectorOpLegalizer scalarize the code. Next, we allow the dag-combiner to convert the BUILD_VECTOR node into a shuffle. This is possible because all of the input...
2012 Feb 08
0
[LLVMdev] SelectionDAG scalarizes vector operations.
Hi Nadav,
> I had a few thoughts regarding our short discussion yesterday.
>
> I am not sure how we can lower SEXT into the vpmovsx family of instructions. I propose the following strategy for the ZEXT and ANYEXT family of functions.
what I would like to understand first is why there are any vector xEXT nodes
at all! As I tried to explain on IRC, I don't think you ever get these from
the GCC autovectorizer except as part...
2012 Feb 08
2
[LLVMdev] SelectionDAG scalarizes vector operations.
...baldrick at free.fr]
Sent: Wednesday, February 08, 2012 10:36
To: Rotem, Nadav
Cc: llvmdev at cs.uiuc.edu
Subject: Re: SelectionDAG scalarizes vector operations.
Hi Nadav,
> I had a few thoughts regarding our short discussion yesterday.
>
> I am not sure how we can lower SEXT into the vpmovsx family of instructions. I propose the following strategy for the ZEXT and ANYEXT family of functions.
what I would like to understand first is why there are any vector xEXT nodes at all! As I tried to explain on IRC, I don't think you ever get these from the GCC autovectorizer except as part...