Displaying 6 results from an estimated 6 matches for "vni8".
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v4i8
2009 Dec 18
0
[LLVMdev] AVX Shuffles & PatLeaf Help Needed
...nd on this with an example? There seems to be an awful lot of
> shuffle patterns and predicates in PPCInstrAltivec.td. What do you mean by,
> "Canonicalize to byte ops?" Can you walk me through how that works with
> Altivec?
The basic idea is quite simple - lower everything to vNi8 and write
all the patterns using only these types.
--
With best regards, Anton Korobeynikov
Faculty of Mathematics and Mechanics, Saint Petersburg State University
2009 Dec 17
3
[LLVMdev] AVX Shuffles & PatLeaf Help Needed
On Thursday 17 December 2009 17:16, Nate Begeman wrote:
> David, this is probably the wrong approach, based on the accreted awfulness
> of the X86 shuffle lowering code,
Ha! I have no issue believing this statement. :)
> The correct approach is probably a rewrite based around what
> AltiVec does: Canonicalize to byte ops, and write all the patterns once
> rather than having to
2009 Dec 18
2
[LLVMdev] AVX Shuffles & PatLeaf Help Needed
...e? There seems to be an awful lot
> > of shuffle patterns and predicates in PPCInstrAltivec.td. What do you
> > mean by, "Canonicalize to byte ops?" Can you walk me through how that
> > works with Altivec?
>
> The basic idea is quite simple - lower everything to vNi8 and write
> all the patterns using only these types.
Yeah, I figured that out after thinking a bit more. However, I think in this
case we only want to lower to vNi32 since there are no immediate-mask shuffles
in X86 that operate on smaller element types. Doing it at the byte level
would just...
2020 Jul 07
2
BUILD_VECTOR disambiguation
...llvm-dev <
llvm-dev at lists.llvm.org> wrote:
> The problem can happen when you want to build a vector of i8, but i8
> itself is not legal on your target. All operands to BUILD_VECTOR will be
> legalized to the next legal integer type, so you can end up with a
> BUILD_VECTOR of vNi8 where all operands are i32, for example.
>
> Actual mixed types are less likely to happen, but if you are doing your
> own target-specific lowering, you can end up with mixed types, simply
> because your code doesn't have to make them all the same.
>
> --
> Krzysztof Parzys...
2020 Jul 07
3
BUILD_VECTOR disambiguation
Thanks for the clarification. The `except` seemed dangling to me, but
it's early here.
Just curious... how do we end up with a mixed type BUILD_VECTOR?
That's counterintuitive.
On Tue, Jul 7, 2020 at 10:58 AM Krzysztof Parzyszek via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
>
> Mixed integer types are ok, but the values will get truncated to the element type of the output
2009 Dec 18
0
[LLVMdev] AVX Shuffles & PatLeaf Help Needed
...be an awful lot
>>> of shuffle patterns and predicates in PPCInstrAltivec.td. What do you
>>> mean by, "Canonicalize to byte ops?" Can you walk me through how that
>>> works with Altivec?
>>
>> The basic idea is quite simple - lower everything to vNi8 and write
>> all the patterns using only these types.
>
> Yeah, I figured that out after thinking a bit more. However, I think in this
> case we only want to lower to vNi32 since there are no immediate-mask shuffles
> in X86 that operate on smaller element types. Doing it at th...