Displaying 9 results from an estimated 9 matches for "vmx_set_cr0".
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vmx_set_cr4
2006 Jul 26
5
[Fwd: stack overflow "cause" found]
...paging_init: 272
0xffff83000010d4d4 __gnttab_map_grant_ref: 256
0xffff83000012780f vsnprintf: 256
0xffff83000012842e scnprintf: 256
0xffff83000014ee3a ptwr_emulated_update: 256
0xffff8300001afb43 vmx_set_cr0: 256
0xffff8300001b05c9 vmx_set_cr0: 256
0xffff8300001336d1 arch_domain_create: 248
0xffff8300001342f0 arch_domain_create: 248
0xffff83000010f7d3 gnttab_transfer: 240
0xffff830000110456 grant_table...
2007 Jul 06
0
[PATCH] a clean up to vmx.c
a clean up to vmx.c:
1) move some functions from vmx.h to vmx.c, since they are private.
2) adjust vmx_set_cr0 handling.
3) majorly coding style tidying.
Signed-off-by: Xin Li <xin.b.li@intel.com>
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2020 Jul 21
0
[PATCH v9 11/84] KVM: x86: add .cr3_write_intercepted()
...x = to_vmx(vcpu);
+
+ return !!(exec_controls_get(vmx) & CPU_BASED_CR3_LOAD_EXITING);
+}
+
static void ept_update_paging_mode_cr0(unsigned long *hw_cr0,
unsigned long cr0,
struct kvm_vcpu *vcpu)
@@ -7890,6 +7897,7 @@ static struct kvm_x86_ops vmx_x86_ops __initdata = {
.set_cr0 = vmx_set_cr0,
.set_cr4 = vmx_set_cr4,
.control_cr3_intercept = vmx_control_cr3_intercept,
+ .cr3_write_intercepted = vmx_cr3_write_intercepted,
.set_efer = vmx_set_efer,
.get_idt = vmx_get_idt,
.set_idt = vmx_set_idt,
2020 Feb 07
0
[RFC PATCH v7 11/78] KVM: x86: add .control_cr3_intercept() to struct kvm_x86_ops
...bit(vmx, CPU_BASED_CR3_LOAD_EXITING |
- CPU_BASED_CR3_STORE_EXITING);
+ vmx_control_cr3_intercept(vcpu, CR_TYPE_RW, false);
vcpu->arch.cr0 = cr0;
vmx_set_cr4(vcpu, kvm_read_cr4(vcpu));
}
@@ -7801,6 +7814,7 @@ static struct kvm_x86_ops vmx_x86_ops __ro_after_init = {
.set_cr0 = vmx_set_cr0,
.set_cr3 = vmx_set_cr3,
.set_cr4 = vmx_set_cr4,
+ .control_cr3_intercept = vmx_control_cr3_intercept,
.set_efer = vmx_set_efer,
.get_idt = vmx_get_idt,
.set_idt = vmx_set_idt,
2020 Jul 21
0
[PATCH v9 10/84] KVM: x86: add .control_cr3_intercept() to struct kvm_x86_ops
...CPU_BASED_CR3_STORE_EXITING);
+ vmx_control_cr3_intercept(vcpu, CR_TYPE_RW, false);
vcpu->arch.cr0 = cr0;
vmx_set_cr4(vcpu, kvm_read_cr4(vcpu));
}
@@ -7876,6 +7889,7 @@ static struct kvm_x86_ops vmx_x86_ops __initdata = {
.get_cs_db_l_bits = vmx_get_cs_db_l_bits,
.set_cr0 = vmx_set_cr0,
.set_cr4 = vmx_set_cr4,
+ .control_cr3_intercept = vmx_control_cr3_intercept,
.set_efer = vmx_set_efer,
.get_idt = vmx_get_idt,
.set_idt = vmx_set_idt,
2011 Dec 05
3
xen 4.0.1/w 2.6.32 swapper: page allocation failure
...Dec 2 01:29:39 xenhost-rack1 kernel: [4437064.012050]
[<ffffffff815b3fb0>] printk+0x3c/0x3e
Dec 2 01:29:39 xenhost-rack1 kernel: [4437064.012052]
[<ffffffff810775c6>] ? release_console_sem+0x1b1/0x1e2
Dec 2 01:29:39 xenhost-rack1 kernel: [4437064.012057]
[<ffffffff8103007f>] ? vmx_set_cr0+0x313/0x4bc
Dec 2 01:29:39 xenhost-rack1 kernel: [4437064.012061]
[<ffffffff814f8de0>] dump_packet+0x310/0x794
Dec 2 01:29:39 xenhost-rack1 kernel: [4437064.012065]
[<ffffffff811d8b90>] ? selinux_ip_postroute+0x2e/0x1d6
Dec 2 01:29:39 xenhost-rack1 kernel: [4437064.012068]
[<fffff...
2007 Mar 28
2
[PATCH 2/3] User-space grant table device - main driver
A character device for accessing (in user-space) pages that have been
granted by other domains.
Signed-off-by: Derek Murray <Derek.Murray@cl.cam.ac.uk>
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2020 Jul 21
87
[PATCH v9 00/84] VM introspection
The KVM introspection subsystem provides a facility for applications
running on the host or in a separate VM, to control the execution of
other VMs (pause, resume, shutdown), query the state of the vCPUs (GPRs,
MSRs etc.), alter the page access bits in the shadow page tables (only
for the hardware backed ones, eg. Intel's EPT) and receive notifications
when events of interest have taken place
2020 Feb 07
78
[RFC PATCH v7 00/78] VM introspection
The KVM introspection subsystem provides a facility for applications
running on the host or in a separate VM, to control the execution of
other VMs (pause, resume, shutdown), query the state of the vCPUs (GPRs,
MSRs etc.), alter the page access bits in the shadow page tables (only
for the hardware backed ones, eg. Intel's EPT) and receive notifications
when events of interest have taken place