search for: vmx_init_vmcs_config

Displaying 10 results from an estimated 10 matches for "vmx_init_vmcs_config".

2008 Jan 11
4
GP exception on vmxon
...de. In this step I also set x86_cr0_ne ( cr0.bit5) 4. call start_vmx. This start_vmx function is similar to the one in xen3.1.0 a. test cpuid with eax = 1. ecx.vmxe(bit5) is 1. b. Test IA32_FEATURE_CONTROL_MSR, result is 0x05, so bit 0 and bit 2 are both 1. c. Set cr4.vmxe (bit13) to 1 d. Call vmx_init_vmcs_config(). This function is the same as in xen3.1.0. e. Call vmxon, passing it the physical adderss calculated in step2, using the same op-code as xen f. stop vmx by calling vmxoff. Using "while(1)", I traced and found the GP exception happened in step 4.e. >From Intel Software Deve...
2012 Jan 09
1
[PATCH] VMX: print Pause Loop Exiting disabled message just once
... rather than per booting CPU. Signed-off-by: Jan Beulich <jbeulich@suse.com> --- a/xen/arch/x86/hvm/vmx/vmcs.c +++ b/xen/arch/x86/hvm/vmx/vmcs.c @@ -249,7 +249,8 @@ static int vmx_init_vmcs_config(void) if ( (_vmx_secondary_exec_control & SECONDARY_EXEC_PAUSE_LOOP_EXITING) && ple_gap == 0 ) { - printk("Disable Pause-Loop Exiting.\n"); + if ( !vmx_pin_based_exec_control ) + printk(XENLOG_INFO "Disable Pause-Loop Exiting....
2009 Jul 07
0
[PATCH] [VMX] Add support for Pause-Loop Exiting
...ap", ple_gap); +static unsigned int ple_window = 4096; +integer_param("ple_window", ple_window); + /* Dynamic (run-time adjusted) execution control flags. */ u32 vmx_pin_based_exec_control __read_mostly; u32 vmx_cpu_based_exec_control __read_mostly; @@ -140,7 +154,8 @@ static void vmx_init_vmcs_config(void) min = 0; opt = (SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES | SECONDARY_EXEC_WBINVD_EXITING | - SECONDARY_EXEC_ENABLE_EPT); + SECONDARY_EXEC_ENABLE_EPT | + SECONDARY_EXEC_PAUSE_LOOP_EXITING); if ( opt_vpid_enable...
2013 Dec 02
0
[PATCH v4 3/7] X86: MPX IA32_BNDCFGS msr handle
...unt == 0) && !hap_enabled(d) ) *ebx &= ~cpufeat_mask(X86_FEATURE_INVPCID); diff --git a/xen/arch/x86/hvm/vmx/vmcs.c b/xen/arch/x86/hvm/vmx/vmcs.c index 290b42f..4a1f168 100644 --- a/xen/arch/x86/hvm/vmx/vmcs.c +++ b/xen/arch/x86/hvm/vmx/vmcs.c @@ -270,7 +270,8 @@ static int vmx_init_vmcs_config(void) } min = VM_EXIT_ACK_INTR_ON_EXIT; - opt = VM_EXIT_SAVE_GUEST_PAT | VM_EXIT_LOAD_HOST_PAT; + opt = VM_EXIT_SAVE_GUEST_PAT | VM_EXIT_LOAD_HOST_PAT | + VM_EXIT_CLEAR_BNDCFGS; min |= VM_EXIT_IA32E_MODE; _vmx_vmexit_control = adjust_vmx_controls( &quot...
2013 Sep 23
11
[PATCH v4 0/4] x86/HVM: miscellaneous improvements
The first and third patches are cleaned up versions of an earlier v3 submission by Yang. 1: Nested VMX: check VMX capability before read VMX related MSRs 2: VMX: clean up capability checks 3: Nested VMX: fix IA32_VMX_CR4_FIXED1 msr emulation 4: x86: make hvm_cpuid() tolerate NULL pointers Signed-off-by: Jan Beulich <jbeulich@suse.com>
2011 Nov 24
0
[PATCH 6/6] X86: implement PCID/INVPCID for hvm
...EATURE_INVPCID); break; case 0xb: /* Fix the x2APIC identifier. */ diff -r c61a5ba8c972 xen/arch/x86/hvm/vmx/vmcs.c --- a/xen/arch/x86/hvm/vmx/vmcs.c Tue Nov 22 02:47:51 2011 +0800 +++ b/xen/arch/x86/hvm/vmx/vmcs.c Tue Nov 22 16:15:19 2011 +0800 @@ -183,7 +183,8 @@ static int vmx_init_vmcs_config(void) SECONDARY_EXEC_WBINVD_EXITING | SECONDARY_EXEC_ENABLE_EPT | SECONDARY_EXEC_ENABLE_RDTSCP | - SECONDARY_EXEC_PAUSE_LOOP_EXITING); + SECONDARY_EXEC_PAUSE_LOOP_EXITING | + SECONDARY_EXEC_ENABLE_INVPCID);...
2013 Jan 21
6
[PATCH v3 0/4] nested vmx: enable VMCS shadowing feature
Changes from v2 to v3: - Use pfn_to_paddr() to get the address from frame number instead of doing shift directly. - Remove some unnecessary initialization code and add "static" to vmentry_fields and gpdptr_fields. - Enable the VMREAD/VMWRITE bitmap only if nested hvm is enabled. - Use clear_page() to set all 0 to the page instead of memset(). - Use domheap to allocate the
2013 Jan 29
3
[PATCH v4 2/2] Xen: Fix VMCS setting for x2APIC mode guest while enabling APICV
...tualize x2APIC mode" for APICV first. Signed-off-by: Jiongxi Li <jiongxi.li@intel.com> diff --git a/xen/arch/x86/hvm/vmx/vmcs.c b/xen/arch/x86/hvm/vmx/vmcs.c index de22e03..4807eb2 100644 --- a/xen/arch/x86/hvm/vmx/vmcs.c +++ b/xen/arch/x86/hvm/vmx/vmcs.c @@ -190,7 +190,8 @@ static int vmx_init_vmcs_config(void) */ if ( _vmx_cpu_based_exec_control & CPU_BASED_TPR_SHADOW ) opt |= SECONDARY_EXEC_APIC_REGISTER_VIRT | - SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY; + SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY | + SECONDARY_EXEC_V...
2012 Sep 14
0
[ PATCH v3 2/3] xen: enable Virtual-interrupt delivery
...; P(cpu_has_vmx_unrestricted_guest, "Unrestricted Guest"); P(cpu_has_vmx_apic_reg_virt, "APIC Register Virtualization"); + P(cpu_has_vmx_virtual_intr_delivery, "Virtual Interrupt Delivery"); #undef P if ( !printed ) @@ -188,11 +189,12 @@ static int vmx_init_vmcs_config(void) opt |= SECONDARY_EXEC_UNRESTRICTED_GUEST; /* - * "APIC Register Virtualization" + * "APIC Register Virtualization" and "Virtual Interrupt Delivery" * can be set only when "use TPR shadow" is set...
2013 Apr 09
39
[PATCH 0/4] Add posted interrupt supporting
From: Yang Zhang <yang.z.zhang@Intel.com> The follwoing patches are adding the Posted Interrupt supporting to Xen: Posted Interrupt allows vAPIC interrupts to inject into guest directly without any vmexit. - When delivering a interrupt to guest, if target vcpu is running, update Posted-interrupt requests bitmap and send a notification event to the vcpu. Then the vcpu will handle this