search for: vmi_uint64

...Send feedback to zach@vmware.com + * + */ + +#ifndef __MACH_VMI_H +#define __MACH_VMI_H + +/* Linux type system definitions */ +#include <linux/types.h> +struct tss_struct; +struct Xgt_desc_struct; +typedef struct tss_struct VMI_TASK; +typedef struct Xgt_desc_struct VMI_DTR; +typedef uint64_t VMI_UINT64; +typedef uint32_t VMI_UINT32; +typedef uint16_t VMI_UINT16; +typedef uint16_t VMI_SELECTOR; +typedef uint8_t VMI_UINT8; +typedef int8_t VMI_INT8; +typedef uint8_t VMI_BOOL; +typedef uint64_t VMI_CYCLES; + +#include <paravirtualInterface.h> +#include <mach_asm.h> + +#if defined(CONFIG_V...

...Send feedback to zach@vmware.com + * + */ + +#ifndef __MACH_VMI_H +#define __MACH_VMI_H + +/* Linux type system definitions */ +#include <linux/types.h> +struct tss_struct; +struct Xgt_desc_struct; +typedef struct tss_struct VMI_TASK; +typedef struct Xgt_desc_struct VMI_DTR; +typedef uint64_t VMI_UINT64; +typedef uint32_t VMI_UINT32; +typedef uint16_t VMI_UINT16; +typedef uint16_t VMI_SELECTOR; +typedef uint8_t VMI_UINT8; +typedef int8_t VMI_INT8; +typedef uint8_t VMI_BOOL; +typedef uint64_t VMI_CYCLES; + +#include <paravirtualInterface.h> +#include <mach_asm.h> + +#if defined(CONFIG_V...

...rewritten by the hypervisor. Some of these calls are performance critical + during context switch paths, and some are not, but they are all included + for completeness, with the exceptions of the obsoleted LMSW and SMSW + instructions. + + VMI_WRMSR + + VMICALL void VMI_WRMSR(VMI_UINT64 val, VMI_UINT32 reg); + + Write to a model specific register. This functions identically to the + hardware WRMSR instruction. Note that a hypervisor may not implement + the full set of MSRs supported by native hardware, since many of them + are not useful in the context of...

...rewritten by the hypervisor. Some of these calls are performance critical + during context switch paths, and some are not, but they are all included + for completeness, with the exceptions of the obsoleted LMSW and SMSW + instructions. + + VMI_WRMSR + + VMICALL void VMI_WRMSR(VMI_UINT64 val, VMI_UINT32 reg); + + Write to a model specific register. This functions identically to the + hardware WRMSR instruction. Note that a hypervisor may not implement + the full set of MSRs supported by native hardware, since many of them + are not useful in the context of...

...struct VROMCallTable { + VROMCallEntry vromCall[128]; // @ 0x80: ROM calls 4-127 +} VROMCallTable; + +/* State needed to start an application processor in an SMP system. */ +typedef struct APState { + VMI_UINT32 cr0; + VMI_UINT32 cr2; + VMI_UINT32 cr3; + VMI_UINT32 cr4; + + VMI_UINT64 efer; + + VMI_UINT32 eip; + VMI_UINT32 eflags; + VMI_UINT32 eax; + VMI_UINT32 ebx; + VMI_UINT32 ecx; + VMI_UINT32 edx; + VMI_UINT32 esp; + VMI_UINT32 ebp; + VMI_UINT32 esi; + VMI_UINT32 edi; + VMI_UINT16 cs; + VMI_UINT16 ss; + VMI_UINT16 ds; + VMI_UINT16 es; + VMI_UINT...

...struct VROMCallTable { + VROMCallEntry vromCall[128]; // @ 0x80: ROM calls 4-127 +} VROMCallTable; + +/* State needed to start an application processor in an SMP system. */ +typedef struct APState { + VMI_UINT32 cr0; + VMI_UINT32 cr2; + VMI_UINT32 cr3; + VMI_UINT32 cr4; + + VMI_UINT64 efer; + + VMI_UINT32 eip; + VMI_UINT32 eflags; + VMI_UINT32 eax; + VMI_UINT32 ebx; + VMI_UINT32 ecx; + VMI_UINT32 edx; + VMI_UINT32 esp; + VMI_UINT32 ebp; + VMI_UINT32 esi; + VMI_UINT32 edi; + VMI_UINT16 cs; + VMI_UINT16 ss; + VMI_UINT16 ds; + VMI_UINT16 es; + VMI_UINT...

...INT32 val; + + val = test_and_clear_bit(bit, (volatile unsigned long *)pte); + return val; +} + +VMICALL int VMI_TestAndSetPxEBit(VMI_UINT32 *pte, int bit) +{ + VMI_UINT32 val; + + val = test_and_set_bit(bit, (volatile unsigned long *)pte); + return val; +} + +VMICALL int VMI_TestAndClearPxELongBit(VMI_UINT64 *pte, int bit) +{ + return VMI_TestAndClearPxEBit((VMI_UINT32 *)pte, bit); +} + +VMICALL int VMI_TestAndSetPxELongBit(VMI_UINT64 *pte, int bit) +{ + return VMI_TestAndSetPxEBit((VMI_UINT32 *)pte, bit); +} + +VMICALL void VMI_AllocatePage(VMI_UINT32 ppn, int flags, VMI_UINT32 orig, int base, +...

...INT32 val; + + val = test_and_clear_bit(bit, (volatile unsigned long *)pte); + return val; +} + +VMICALL int VMI_TestAndSetPxEBit(VMI_UINT32 *pte, int bit) +{ + VMI_UINT32 val; + + val = test_and_set_bit(bit, (volatile unsigned long *)pte); + return val; +} + +VMICALL int VMI_TestAndClearPxELongBit(VMI_UINT64 *pte, int bit) +{ + return VMI_TestAndClearPxEBit((VMI_UINT32 *)pte, bit); +} + +VMICALL int VMI_TestAndSetPxELongBit(VMI_UINT64 *pte, int bit) +{ + return VMI_TestAndSetPxEBit((VMI_UINT32 *)pte, bit); +} + +VMICALL void VMI_AllocatePage(VMI_UINT32 ppn, int flags, VMI_UINT32 orig, int base, +...

...+static inline VMI_CYCLES vmi_get_stolen_cycles(void) +{ + VMI_CYCLES ret; + vmi_wrap_call( + GetCycleCounter, "xor %%eax, %%eax;" + "xor %%edx, %%edx;", + VMI_OREG64 (ret), + 1, VMI_IREG1(VMI_CYCLES_STOLEN), + VMI_CLOBBER(TWO_RETURNS)); + return ret; +} + +static inline VMI_UINT64 vmi_get_wallclock(void) +{ + VMI_UINT64 ret; + vmi_wrap_call( + GetWallclockTime, "xor %%eax, %%eax;" + "xor %%edx, %%edx;", + VMI_OREG64 (ret), + 0, VMI_NO_INPUT, + VMI_CLOBBER(TWO_RETURNS)); + return ret; +} + +static inline VMI_BOOL vmi_wallclock_updated(void) +{ + V...

...+static inline VMI_CYCLES vmi_get_stolen_cycles(void) +{ + VMI_CYCLES ret; + vmi_wrap_call( + GetCycleCounter, "xor %%eax, %%eax;" + "xor %%edx, %%edx;", + VMI_OREG64 (ret), + 1, VMI_IREG1(VMI_CYCLES_STOLEN), + VMI_CLOBBER(TWO_RETURNS)); + return ret; +} + +static inline VMI_UINT64 vmi_get_wallclock(void) +{ + VMI_UINT64 ret; + vmi_wrap_call( + GetWallclockTime, "xor %%eax, %%eax;" + "xor %%edx, %%edx;", + VMI_OREG64 (ret), + 0, VMI_NO_INPUT, + VMI_CLOBBER(TWO_RETURNS)); + return ret; +} + +static inline VMI_BOOL vmi_wallclock_updated(void) +{ + V...