Displaying 6 results from an estimated 6 matches for "vmi_oreg64".
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vmi_oreg1
2007 Apr 18
2
[RFC, PATCH 17/24] i386 Vmi msr patch
...0000000 -0800
+++ linux-2.6.16-rc5/include/asm-i386/mach-vmi/mach_msr.h 2006-03-08 10:32:30.000000000 -0800
@@ -0,0 +1,79 @@
+#ifndef MACH_MSR_H
+#define MACH_MSR_H
+
+#include <vmi.h>
+
+static inline u64 vmi_rdmsr(const u32 msr)
+{
+ u64 ret;
+ vmi_wrap_call(
+ RDMSR, "rdmsr",
+ VMI_OREG64 (ret),
+ 1, "c" (msr),
+ VMI_CLOBBER(TWO_RETURNS));
+ return ret;
+}
+
+#define rdmsr(msr,val1,val2) \
+do { \
+ u64 _val = vmi_rdmsr(msr); \
+ val1 = (u32)_val; \
+ val2 = (u32)(_val >> 32); \
+} while (0)
+
+static inline void wrmsr(const u32 msr, const u32 valLo, const u32 valH...
2007 Apr 18
2
[RFC, PATCH 17/24] i386 Vmi msr patch
...0000000 -0800
+++ linux-2.6.16-rc5/include/asm-i386/mach-vmi/mach_msr.h 2006-03-08 10:32:30.000000000 -0800
@@ -0,0 +1,79 @@
+#ifndef MACH_MSR_H
+#define MACH_MSR_H
+
+#include <vmi.h>
+
+static inline u64 vmi_rdmsr(const u32 msr)
+{
+ u64 ret;
+ vmi_wrap_call(
+ RDMSR, "rdmsr",
+ VMI_OREG64 (ret),
+ 1, "c" (msr),
+ VMI_CLOBBER(TWO_RETURNS));
+ return ret;
+}
+
+#define rdmsr(msr,val1,val2) \
+do { \
+ u64 _val = vmi_rdmsr(msr); \
+ val1 = (u32)_val; \
+ val2 = (u32)(_val >> 32); \
+} while (0)
+
+static inline void wrmsr(const u32 msr, const u32 valLo, const u32 valH...
2007 Apr 18
0
[RFC, PATCH 23/24] i386 Vmi timer patch
...or 'halted'.
+ *
+ * All three views of time are accessible through the VMI cycle
+ * counters.
+ */
+
+static inline VMI_CYCLES vmi_get_cycle_frequency(void)
+{
+ VMI_CYCLES ret;
+ vmi_wrap_call(
+ GetCycleFrequency, "xor %%eax, %%eax;"
+ "xor %%edx, %%edx;",
+ VMI_OREG64 (ret),
+ 0, VMI_NO_INPUT,
+ VMI_CLOBBER(TWO_RETURNS));
+ return ret;
+}
+
+static inline VMI_CYCLES vmi_get_real_cycles(void)
+{
+ VMI_CYCLES ret;
+ vmi_wrap_call(
+ GetCycleCounter, "rdtsc",
+ VMI_OREG64 (ret),
+ 1, VMI_IREG1(VMI_CYCLES_REAL),
+ VMI_CLOBBER(TWO_RETURNS));
+ return...
2007 Apr 18
0
[RFC, PATCH 23/24] i386 Vmi timer patch
...or 'halted'.
+ *
+ * All three views of time are accessible through the VMI cycle
+ * counters.
+ */
+
+static inline VMI_CYCLES vmi_get_cycle_frequency(void)
+{
+ VMI_CYCLES ret;
+ vmi_wrap_call(
+ GetCycleFrequency, "xor %%eax, %%eax;"
+ "xor %%edx, %%edx;",
+ VMI_OREG64 (ret),
+ 0, VMI_NO_INPUT,
+ VMI_CLOBBER(TWO_RETURNS));
+ return ret;
+}
+
+static inline VMI_CYCLES vmi_get_real_cycles(void)
+{
+ VMI_CYCLES ret;
+ vmi_wrap_call(
+ GetCycleCounter, "rdtsc",
+ VMI_OREG64 (ret),
+ 1, VMI_IREG1(VMI_CYCLES_REAL),
+ VMI_CLOBBER(TWO_RETURNS));
+ return...
2007 Apr 18
3
[RFC, PATCH 4/24] i386 Vmi inline implementation
...uot;
+#define VMI_IREG3 "ir"
+#endif
+#define VMI_IREG4 "ir"
+#define VMI_IREG5 "ir"
+
+#if (__GNUC__ == 4)
+#define VMI_IMM "i"
+#else
+#define VMI_IMM "iV"
+#endif
+
+#define VMI_OREG1 "=a"
+#define VMI_OREG2 "=d"
+#define VMI_OREG64 "=A"
+
+#define vmi_input(arg) \
+ "push %" XSTR(arg) ";"
+
+#if defined(CONFIG_VMI_REGPARM)
+#define vmi_input_early(arg)
+#else
+#define vmi_input_early(arg) \
+ "push %" XSTR(arg) ";"
+#endif
+
+#define vmi_input0
+
+#define vmi_input1 \
+ vm...
2007 Apr 18
3
[RFC, PATCH 4/24] i386 Vmi inline implementation
...uot;
+#define VMI_IREG3 "ir"
+#endif
+#define VMI_IREG4 "ir"
+#define VMI_IREG5 "ir"
+
+#if (__GNUC__ == 4)
+#define VMI_IMM "i"
+#else
+#define VMI_IMM "iV"
+#endif
+
+#define VMI_OREG1 "=a"
+#define VMI_OREG2 "=d"
+#define VMI_OREG64 "=A"
+
+#define vmi_input(arg) \
+ "push %" XSTR(arg) ";"
+
+#if defined(CONFIG_VMI_REGPARM)
+#define vmi_input_early(arg)
+#else
+#define vmi_input_early(arg) \
+ "push %" XSTR(arg) ";"
+#endif
+
+#define vmi_input0
+
+#define vmi_input1 \
+ vm...