Displaying 4 results from an estimated 4 matches for "vmcx_eaddr".
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vmci_addr
2012 Jun 27
1
[PATCH] x86/hvm: increase struct hvm_vcpu_io's mmio_large_read
...io_large_read_bytes;
- /* We may write up to m128 as a number of device-model transactions. */
- paddr_t mmio_large_write_pa;
+ /* We may write up to m256 as a number of device-model transactions. */
unsigned int mmio_large_write_bytes;
+ paddr_t mmio_large_write_pa;
};
#define VMCX_EADDR (~0ULL)
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2013 Nov 26
6
[PATCH v5] x86: properly handle MSI-X unmask operation from guests
patch revision history
----------------------
v1: Initial patch to handle this issue involving changing the hypercall interface
v2:Totally handled inside hypervisor.
v3:Change some logics of handling msi-x pending unmask operations.
v4:Some changes related to coding style according to Andrew Cooper''s comments
v5:Some changes according to Jan''s comments, including
a) remove
2013 Jan 21
6
[PATCH v3 0/4] nested vmx: enable VMCS shadowing feature
Changes from v2 to v3:
- Use pfn_to_paddr() to get the address from frame number instead of doing shift directly.
- Remove some unnecessary initialization code and add "static" to vmentry_fields and gpdptr_fields.
- Enable the VMREAD/VMWRITE bitmap only if nested hvm is enabled.
- Use clear_page() to set all 0 to the page instead of memset().
- Use domheap to allocate the
2012 Dec 10
26
[PATCH 00/11] Add virtual EPT support Xen.
From: Zhang Xiantao <xiantao.zhang@intel.com>
With virtual EPT support, L1 hyerpvisor can use EPT hardware
for L2 guest''s memory virtualization. In this way, L2 guest''s
performance can be improved sharply. According to our testing,
some benchmarks can show > 5x performance gain.
Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com>
Zhang Xiantao (11):