Displaying 2 results from an estimated 2 matches for "vld2".
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2015 May 05
2
[LLVMdev] [AArch64] Should we restrict to the pointer type used in ldN/stN intrinsics?
...tNlane) can use any pointer types. The definition (in IntrinsicsAArch64.td)
of such intrinsics use 'LLVMAnyPointerType', which means we can pass any
pointer type to such intrinsics.
E.g. I tried following case ld2.ll:
define { <4 x i32>, <4 x i32> } @test(float* %ptr) {
%vld2 = call { <4 x i32>, <4 x i32> }
@llvm.aarch64.neon.ld2.v4i32.p0f32(float* %ptr)
ret { <4 x i32>, <4 x i32> } %vld2
}
declare { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0f32(float*)
It can pass and generate ld2 with "llc -march=aarch64 &l...
2014 Dec 21
3
[LLVMdev] Indexed Load and Store Intrinsics - proposal
On 12/18/2014 11:56 AM, dag at cray.com wrote:
> "Demikhovsky, Elena" <elena.demikhovsky at intel.com> writes:
>
>> Semantics:
>> For i=0,1,…,N-1: if (Mask[i]) {*(BaseAddr + VectorOfIndices[i]*Scale)
>> = VectorValue[i];}
>> VectorValue: any float or integer vector type.
>> BaseAddr: a pointer; may be zero if full address is placed in the