search for: virtual_intr_delivery_enabled

...e_EOI(vlapic_domain(vlapic), vector); + + hvm_dpci_msi_eoi(current->domain, vector); +} + int vlapic_ipi( struct vlapic *vlapic, uint32_t icr_low, uint32_t icr_high) { @@ -1000,6 +1011,14 @@ void vlapic_adjust_i8259_target(struct d pt_adjust_global_vcpu_target(v); } +int vlapic_virtual_intr_delivery_enabled(void) +{ + if ( hvm_funcs.virtual_intr_delivery_enabled ) + return hvm_funcs.virtual_intr_delivery_enabled(); + else + return 0; +} + int vlapic_has_pending_irq(struct vcpu *v) { struct vlapic *vlapic = vcpu_vlapic(v); @@ -1012,6 +1031,9 @@ int vlapic_has_pending_irq(stru...

...__vmwrite(GUEST_INTR_STATUS, status); if (v->arch.hvm_vmx.eoi_exitmap_changed) { diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index 4d7c93f..43ed36c 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -1419,6 +1419,28 @@ static int vmx_virtual_intr_delivery_enabled(void) return cpu_has_vmx_virtual_intr_delivery; } +static void vmx_process_isr(int isr, struct vcpu *v) +{ + unsigned long status; + u8 old; + + if ( !cpu_has_vmx_virtual_intr_delivery ) + return; + + if (isr < 0) + isr = 0; + + vmx_vmcs_enter(v); + status...

From: Yang Zhang <yang.z.zhang@Intel.com> The follwoing patches are adding the Posted Interrupt supporting to Xen: Posted Interrupt allows vAPIC interrupts to inject into guest directly without any vmexit. - When delivering a interrupt to guest, if target vcpu is running, update Posted-interrupt requests bitmap and send a notification event to the vcpu. Then the vcpu will handle this

From: Zhang Xiantao <xiantao.zhang@intel.com> With virtual EPT support, L1 hyerpvisor can use EPT hardware for L2 guest''s memory virtualization. In this way, L2 guest''s performance can be improved sharply. According to our testing, some benchmarks can show > 5x performance gain. Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com> Zhang Xiantao (11):