search for: virtiozzo

Displaying 8 results from an estimated 8 matches for "virtiozzo".

2015 Oct 09
2
[PATCH 2/2] kvm/x86: Hyper-V kvm exit
...> > > A new vcpu exit is introduced to notify the userspace of the > changes in Hyper-V synic configuraion triggered by guest writing to the > corresponding MSRs. > > Signed-off-by: Andrey Smetanin <asmetanin at virtuozzo.com> > Reviewed-by: Roman Kagan <rkagan at virtiozzo.com> > Signed-off-by: Denis V. Lunev <den at openvz.org> > CC: Vitaly Kuznetsov <vkuznets at redhat.com> > CC: "K. Y. Srinivasan" <kys at microsoft.com> > CC: Gleb Natapov <gleb at kernel.org> > CC: Paolo Bonzini <pbonzini at redhat.com> Wh...
2015 Oct 09
2
[PATCH 2/2] kvm/x86: Hyper-V kvm exit
...> > > A new vcpu exit is introduced to notify the userspace of the > changes in Hyper-V synic configuraion triggered by guest writing to the > corresponding MSRs. > > Signed-off-by: Andrey Smetanin <asmetanin at virtuozzo.com> > Reviewed-by: Roman Kagan <rkagan at virtiozzo.com> > Signed-off-by: Denis V. Lunev <den at openvz.org> > CC: Vitaly Kuznetsov <vkuznets at redhat.com> > CC: "K. Y. Srinivasan" <kys at microsoft.com> > CC: Gleb Natapov <gleb at kernel.org> > CC: Paolo Bonzini <pbonzini at redhat.com> Wh...
2015 Oct 09
0
[PATCH 2/2] kvm/x86: Hyper-V kvm exit
...anin <asmetanin at virtuozzo.com> A new vcpu exit is introduced to notify the userspace of the changes in Hyper-V synic configuraion triggered by guest writing to the corresponding MSRs. Signed-off-by: Andrey Smetanin <asmetanin at virtuozzo.com> Reviewed-by: Roman Kagan <rkagan at virtiozzo.com> Signed-off-by: Denis V. Lunev <den at openvz.org> CC: Vitaly Kuznetsov <vkuznets at redhat.com> CC: "K. Y. Srinivasan" <kys at microsoft.com> CC: Gleb Natapov <gleb at kernel.org> CC: Paolo Bonzini <pbonzini at redhat.com> --- Documentation/virtual/k...
2015 Oct 16
0
[PATCH 9/9] kvm/x86: Hyper-V kvm exit
...nin <asmetanin at virtuozzo.com> A new vcpu exit is introduced to notify the userspace of the changes in Hyper-V SynIC configuration triggered by guest writing to the corresponding MSRs. Signed-off-by: Andrey Smetanin <asmetanin at virtuozzo.com> Reviewed-by: Roman Kagan <rkagan at virtiozzo.com> Signed-off-by: Denis V. Lunev <den at openvz.org> CC: Vitaly Kuznetsov <vkuznets at redhat.com> CC: "K. Y. Srinivasan" <kys at microsoft.com> CC: Gleb Natapov <gleb at kernel.org> CC: Paolo Bonzini <pbonzini at redhat.com> --- Documentation/virtual/k...
2015 Oct 09
5
[PATCH 0/2] Hyper-V synthetic interrupt controller
This patchset implements the KVM part of the synthetic interrupt controller (synic) which is a building block of the Hyper-V paravirtualized device bus (vmbus). Synic is a lapic extension, which is controlled via MSRs and maintains for each vCPU - 16 synthetic interrupt "lines" (SINT's); each can be configured to trigger a specific interrupt vector optionally with auto-EOI
2015 Oct 09
5
[PATCH 0/2] Hyper-V synthetic interrupt controller
This patchset implements the KVM part of the synthetic interrupt controller (synic) which is a building block of the Hyper-V paravirtualized device bus (vmbus). Synic is a lapic extension, which is controlled via MSRs and maintains for each vCPU - 16 synthetic interrupt "lines" (SINT's); each can be configured to trigger a specific interrupt vector optionally with auto-EOI
2015 Oct 16
10
[PATCH v2 0/9] Hyper-V synthetic interrupt controller
This patchset implements the KVM part of the synthetic interrupt controller (SynIC) which is a building block of the Hyper-V paravirtualized device bus (vmbus). SynIC is a lapic extension, which is controlled via MSRs and maintains for each vCPU - 16 synthetic interrupt "lines" (SINT's); each can be configured to trigger a specific interrupt vector optionally with auto-EOI
2015 Oct 16
10
[PATCH v2 0/9] Hyper-V synthetic interrupt controller
This patchset implements the KVM part of the synthetic interrupt controller (SynIC) which is a building block of the Hyper-V paravirtualized device bus (vmbus). SynIC is a lapic extension, which is controlled via MSRs and maintains for each vCPU - 16 synthetic interrupt "lines" (SINT's); each can be configured to trigger a specific interrupt vector optionally with auto-EOI