Displaying 3 results from an estimated 3 matches for "vgprregbank".
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2017 May 10
2
Bug in TableGen RegisterBankEmitter
Hi,
I've run into an issue with the RegisterBankEmitter on the AMDGPU backend.
AMDGPU has a register class: VS_32, which is non-allocatable and contains
registers from both defined register banks (SGPRRegBank and VGPRRegBank).
The RegisterBankEmitter is adding this class to the CoverageData array
for both register classes, because it contains sub-registers of one
of the classes explicitly added to the RegisterBank, for example:
Added VS_32(explicit (VS_32) VReg_64 class-with-subregs: VReg_64)
This is a problem, beca...
2017 May 10
2
Bug in TableGen RegisterBankEmitter
...lists.llvm.org> wrote:
>>
>> Hi,
>>
>> I've run into an issue with the RegisterBankEmitter on the AMDGPU backend.
>> AMDGPU has a register class: VS_32, which is non-allocatable and contains
>> registers from both defined register banks (SGPRRegBank and VGPRRegBank).
>>
>> The RegisterBankEmitter is adding this class to the CoverageData array
>> for both register classes, because it contains sub-registers of one
>> of the classes explicitly added to the RegisterBank, for example:
>>
>> Added VS_32(explicit (VS_32) VReg_64...
2017 May 16
2
Bug in TableGen RegisterBankEmitter
...t;>>> Hi,
>>>>
>>>> I've run into an issue with the RegisterBankEmitter on the AMDGPU backend.
>>>> AMDGPU has a register class: VS_32, which is non-allocatable and contains
>>>> registers from both defined register banks (SGPRRegBank and VGPRRegBank).
>>>>
>>>> The RegisterBankEmitter is adding this class to the CoverageData array
>>>> for both register classes, because it contains sub-registers of one
>>>> of the classes explicitly added to the RegisterBank, for example:
>>>>
>>...