Displaying 6 results from an estimated 6 matches for "vgpr1".
2019 Nov 13
2
imm COPY generated by PHI elim not propagated
I have some code such that:
vgpr1 = mov 0
branch bb
bb:
PHI vgpr2 = vgpr1, ….
PHI vgpr3 = vgpr1, ….
PHI vgpr4 = vgpr1, ….
PHI vgpr5 = vgpr1, ….
PHI node elimination is generating copies for all these PHIs (and hoisting
them) as such:
vgpr1 = 0
vgpr20 = COPY vgpr1 // old vgpr2
vgpr30 = COPY vgpr1 // old vgpr3
vgpr40 = COPY vgpr1 /...
2019 Nov 14
2
imm COPY generated by PHI elim not propagated
...it triggers a spill, then we rematerialize the immediate instead of holding a register for it.
Cheers,
-Quentin
> On Nov 13, 2019, at 7:36 AM, Ryan Taylor via llvm-dev <llvm-dev at lists.llvm.org> wrote:
>
> I have some code such that:
>
> vgpr1 = mov 0
> branch bb
> bb:
> PHI vgpr2 = vgpr1, ….
> PHI vgpr3 = vgpr1, ….
> PHI vgpr4 = vgpr1, ….
> PHI vgpr5 = vgpr1, ….
>
> PHI node elimination is generating copies for all these PHIs (and hoisting them) as such:
>
> vgpr1 = 0...
2019 Nov 15
2
imm COPY generated by PHI elim not propagated
...nstead of holding a register for it.
> >
> > Cheers,
> > -Quentin
> >
> >> On Nov 13, 2019, at 7:36 AM, Ryan Taylor via llvm-dev <
> llvm-dev at lists.llvm.org> wrote:
> >>
> >> I have some code such that:
> >>
> >> vgpr1 = mov 0
> >> branch bb
> >> bb:
> >> PHI vgpr2 = vgpr1, ….
> >> PHI vgpr3 = vgpr1, ….
> >> PHI vgpr4 = vgpr1, ….
> >> PHI vgpr5 = vgpr1, ….
> >>
> >> PHI node elimination is generating copies for all these PHIs (and
> hoisti...
2019 Nov 20
2
imm COPY generated by PHI elim not propagated
...;> >
>> > Cheers,
>> > -Quentin
>> >
>> >> On Nov 13, 2019, at 7:36 AM, Ryan Taylor via llvm-dev <
>> llvm-dev at lists.llvm.org> wrote:
>> >>
>> >> I have some code such that:
>> >>
>> >> vgpr1 = mov 0
>> >> branch bb
>> >> bb:
>> >> PHI vgpr2 = vgpr1, ….
>> >> PHI vgpr3 = vgpr1, ….
>> >> PHI vgpr4 = vgpr1, ….
>> >> PHI vgpr5 = vgpr1, ….
>> >>
>> >> PHI node elimination is generating copies for...
2013 Oct 10
2
[LLVMdev] [PATCH] R600/SI: Embed disassembly in ELF object
...in a Mesa client with a corresponding
patch and RADEON_DUMP_SHADERS set:
Shader Disassembly:
S_WQM_B64 EXEC, EXEC ; BEFE0A7E
S_MOV_B32 M0, SGPR6 ; BEFC0306
V_INTERP_MOV_F32 VGPR0, P0, 3, 0, [M0] ; C8020302
V_INTERP_MOV_F32 VGPR1, P0, 2, 0, [M0] ; C8060202
V_INTERP_MOV_F32 VGPR2, P0, 1, 0, [M0] ; C80A0102
V_INTERP_MOV_F32 VGPR3, P0, 0, 0, [M0] ; C80E0002
EXP 15, 0, 0, 1, 1, VGPR3, VGPR2, VGPR1, VGPR0 ; F800180F 00010203
S_ENDPGM ; BF810000
A less ver...
2013 Oct 10
0
[LLVMdev] [PATCH] R600/SI: Embed disassembly in ELF object
...> patch and RADEON_DUMP_SHADERS set:
>
> Shader Disassembly:
>
> S_WQM_B64 EXEC, EXEC ; BEFE0A7E
> S_MOV_B32 M0, SGPR6 ; BEFC0306
> V_INTERP_MOV_F32 VGPR0, P0, 3, 0, [M0] ; C8020302
> V_INTERP_MOV_F32 VGPR1, P0, 2, 0, [M0] ; C8060202
> V_INTERP_MOV_F32 VGPR2, P0, 1, 0, [M0] ; C80A0102
> V_INTERP_MOV_F32 VGPR3, P0, 0, 0, [M0] ; C80E0002
> EXP 15, 0, 0, 1, 1, VGPR3, VGPR2, VGPR1, VGPR0 ; F800180F 00010203
> S_ENDPGM ;...