search for: vgic_vcpu_inject_irq

...+ else + on_selected_cpus(cpumask_of(cpu), gic_irq_eoi, (void*)virq, 0); + } + i++; } } diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c index f9c1a6b..c5370d5 100644 --- a/xen/arch/arm/vgic.c +++ b/xen/arch/arm/vgic.c @@ -676,9 +676,14 @@ void vgic_vcpu_inject_irq(struct vcpu *v, unsigned int irq, int virtual) n->irq = irq; n->priority = priority; if (!virtual) + { n->desc = irq_to_desc(irq); - else + cpumask_clear(&n->eoimask); + /* Assume we received the IRQ on the current pcpu */ + cpumask...

Hi all, this small patch series implement guest SMP support for ARM, using the ARM PSCI interface for secondary cpu bringup. Stefano Stabellini (4): xen/arm: basic PSCI support, implement cpu_on xen/arm: support for guest SGI xen/arm: support vcpu_op hypercalls xen: move VCPUOP_register_vcpu_info to common code xen/arch/arm/domain.c | 66 ++++++++++++++++++++++++

...quot;Hypervisor Trap. HSR=0x%x EC=0x%x IL=%x Syndrome=%"PRIx32"\n", hsr.bits, hsr.ec, hsr.len, hsr.iss); diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c index 39b9775..8495384 100644 --- a/xen/arch/arm/vgic.c +++ b/xen/arch/arm/vgic.c @@ -608,12 +608,14 @@ void vgic_vcpu_inject_irq(struct vcpu *v, unsigned int irq, int virtual) { list_add_tail(&n->inflight, &iter->inflight); spin_unlock_irqrestore(&v->arch.vgic.lock, flags); - return; + goto out; } } list_add_tail(&n->infli...

...rupts and is not able to complete servicing the original virtual timer interrupt. If I disable nesting (i.e. do not re-enable IRQs in my service routine), everything works as expected which makes me wonder if the spurious interrupts are related to the virtual timer. I tried adding a debug print in vgic_vcpu_inject_irq to see if xen was injecting some high priority interrupt but found that xen only injects a single virtual timer PPI. Has anyone seen this behavior or has suggestions on how to debug this problem further ? Thanks, Ashish My xen build info: I am using xen 4.5-unstable and am at 8cfc8e520679e029bed...

.../irq.c @@ -156,6 +156,7 @@ void do_IRQ(struct cpu_user_regs *regs, unsigned int irq, int is_fiq) desc->handler->end(desc); desc->status |= IRQ_INPROGRESS; + desc->arch.eoi_cpu = smp_processor_id(); /* XXX: inject irq into all guest vcpus */ vgic_vcpu_inject_irq(d->vcpu[0], irq, 0); diff --git a/xen/include/asm-arm/irq.h b/xen/include/asm-arm/irq.h index 9fc008c..eeb733a 100644 --- a/xen/include/asm-arm/irq.h +++ b/xen/include/asm-arm/irq.h @@ -15,6 +15,7 @@ struct arch_pirq struct irq_cfg { #define arch_irq_desc irq_cfg + int eoi_cpu; }; #de...

I''ve addressed all (I think/hope) of the review comments. The main change is to expose the guest virtual platform (e.g. memory layout and interrupt usage etc) to the toolstack via the public interface. This is then used during FDT generation. I have just codified the current defacto standard layout, it''s probably not the best layout but any change can be a separate patch/series.

Biggest change is to switch the new DTB node to /xen-core-devices instead of /xen at Stefano''s request. I also dropped the few patches title HACK etc which weren''t supposed to be there and fixed up some bits and pieces which folks commented on. George, WRT the freeze I think this is functionality which we cannot ship Xen 4.4 without. The impact is entirely constrained to the

If the vgic needs to inject a virtual irq into the guest, but no free LR registers are available, add the irq to a list and return. Whenever an LR register becomes available we add the queued irq to it and remove it from the list. We use the gic lock to protect the list and the bitmask. Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> --- xen/arch/arm/gic.c |

Hello everyone, this is the fourth version of the patch series that introduces ARMv7 with virtualization extensions support in Xen. The series allows Xen and Dom0 to boot on a Cortex-A15 based Versatile Express simulator. See the following announce email for more informations about what we are trying to achieve, as well as the original git history: See

Hello everyone, this is the very first version of the patch series that introduces ARMv7 with virtualization extensions support in Xen. The series allows Xen and Dom0 to boot on a Cortex-A15 based Versatile Express simulator. See the following announce email for more informations about what we are trying to achieve, as well as the original git history: See

This round implements all of the review comments from V2 and all patches are now acked. Unless there are any objections I intend to apply later this morning. Ian.

First off, Apologies for the massive patch series... This series boots a 32-bit dom0 kernel to a command prompt on an ARMv8 (AArch64) model. The kernel is the same one as I am currently using with the 32 bit hypervisor I haven''t yet tried starting a guest or anything super advanced like that ;-). Also there is not real support for 64-bit domains at all, although in one or two places I