Displaying 3 results from an estimated 3 matches for "vfpv3d16".
2013 Jan 08
0
[LLVMdev] ARM failures
...eabihf
--target=armv7l-unknown-linux-gnueabihf
--with-cpu=cortex-a9 --with-fpu=neon
--with-float=hard --enable-optimized
$ cat /proc/cpuinfo
Processor : ARMv7 Processor rev 0 (v7l)
processor : 0
BogoMIPS : 1992.29
processor : 1
BogoMIPS : 1992.29
Features : swp half thumb fastmult vfp edsp vfpv3 vfpv3d16
CPU implementer : 0x41
CPU architecture: 7
CPU variant : 0x1
CPU part : 0xc09
CPU revision : 0
Any ideas?
Dmitri
--
main(i,j){for(i=2;;i++){for(j=2;j<i;j++){if(!(i%j)){j=0;break;}}if
(j){printf("%d\n",i);}}} /*Dmitri Gribenko <gribozavr at gmail.com>*/
2013 Jan 08
6
[LLVMdev] ARM failures
The following failures are consistent on buildbot (and my local box).
The Clang one I think it's assuming an Intel box, the other two look like
the FileCheck are not good enough.
http://lab.llvm.org:8011/builders/clang-native-arm-cortex-a9/builds/4305
Clang :: CodeGen/compound-assign-overflow.c
LLVM :: Transforms/LoopStrengthReduce/post-inc-icmpzero.ll
LLVM ::
2013 Jan 08
2
[LLVMdev] [cfe-dev] ARM failures
...ueabihf
--with-cpu=cortex-a9 --with-fpu=neon
--with-float=hard --enable-optimized
$ cat /proc/cpuinfo
Processor : ARMv7 Processor rev 0 (v7l)
processor : 0
BogoMIPS : 1992.29
processor : 1
BogoMIPS : 1992.29
Features : swp half thumb fastmult vfp edsp vfpv3 vfpv3d16
CPU implementer : 0x41
CPU architecture: 7
CPU variant : 0x1
CPU part : 0xc09
CPU revision : 0
Any ideas?
Dmitri
--
main(i,j){for(i=2;;i++){for(j=2;j<i;j++){if(!(i%j)){j=0;break;}}if
(j){printf("%d\n",i);}}} /*Dmitri Gribenko <gribozavr at gmail.com>*/
__________...