search for: vf432

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2014 Aug 11
2
[LLVMdev] tablegen pattern
...truction/intrinsic function( say " float:$dst llvm.irmod( vec4:$src)" which takes a vec4, output a float. I think the procedure is: when I see the intrinsic llvm.irmod, I need to call "extractlt( mod($src), 0)”, So I tried to define a pattern “ def Pat<( i32 ( llvm.irmod vf432:$src)), (extractelt( mod v4f32:$src ), 0)>”, but it reports ERROR” Cannot use “extractelt” in an output pattern”. I knew I can easily do it via lowering operation by separating the “extractelt” node out. But can I do it via tablgen? Best kevin -------------- next part -------------- An H...