Displaying 2 results from an estimated 2 matches for "vex_prefix_scalar_mask".
2011 Nov 30
0
[PATCH 2/4] x86/emulator: add emulation of SIMD FP moves
..., 0, 0, 0, 0, 0,
+ ImplicitOps|ModRM, ImplicitOps|ModRM, 0, ImplicitOps|ModRM, 0, 0, 0, 0,
/* 0x30 - 0x37 */
ImplicitOps, ImplicitOps, ImplicitOps, 0,
ImplicitOps, ImplicitOps, 0, 0,
@@ -273,6 +273,16 @@ enum vex_pfx {
vex_f2
};
+#define VEX_PREFIX_DOUBLE_MASK 0x1
+#define VEX_PREFIX_SCALAR_MASK 0x2
+
+static const uint8_t sse_prefix[] = { 0x66, 0xf3, 0xf2 };
+
+#define SET_SSE_PREFIX(dst, vex_pfx) do { \
+ if ( vex_pfx ) \
+ (dst) = sse_prefix[(vex_pfx) - 1]; \
+} while (0)
+
union vex {
uint8_t raw[2];
struct {
@@ -3850,6 +3860,76 @@ x86_emulate(
case 0x19 ... 0...
2013 Aug 28
3
[PATCH] x86: AVX instruction emulation fixes
...rex_prefix |= REX_R;
fail_if(vex.opcx != vex_0f);
@@ -3899,8 +3896,9 @@ x86_emulate(
else
{
fail_if((vex.opcx != vex_0f) ||
- (vex.reg && ((ea.type == OP_MEM) ||
- !(vex.pfx & VEX_PREFIX_SCALAR_MASK))));
+ ((vex.reg != 0xf) &&
+ ((ea.type == OP_MEM) ||
+ !(vex.pfx & VEX_PREFIX_SCALAR_MASK))));
vcpu_must_have_avx();
get_fpu(X86EMUL_FPU_ymm, &fic);
ea.bytes = 16 << vex.l;
@@ -...